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P6.gise
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
<!-- -->
<!-- For tool use only. Do not edit. -->
<!-- -->
<!-- ProjectNavigator created generated project file. -->
<!-- For use in tracking generated file and other information -->
<!-- allowing preservation of process status. -->
<!-- -->
<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="P6.xise"/>
<files xmlns="http://www.xilinx.com/XMLSchema">
<file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="A3_plexer_stx_beh.prj"/>
<file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="ALU_stx_beh.prj"/>
<file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="DE_stx_beh.prj"/>
<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_ISIM_EXE" xil_pn:name="MUDI_TB_isim_beh.exe"/>
<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_ISIM_EXE" xil_pn:name="MUDI_isim_beh.exe"/>
<file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="MUDI_stx_beh.prj"/>
<file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="MUDI_tb_stx_beh.prj"/>
<file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="controller_stx_beh.prj"/>
<file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="datapath_stx_beh.prj"/>
<file xil_pn:fileType="FILE_LOG" xil_pn:name="fuse.log"/>
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="isim"/>
<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_CMD" xil_pn:name="isim.cmd"/>
<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_LOG" xil_pn:name="isim.log"/>
<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_ISIM_EXE" xil_pn:name="mips_isim_beh.exe"/>
<file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="mips_stx_beh.prj"/>
<file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="mips_tb_beh.prj"/>
<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_ISIM_EXE" xil_pn:name="mips_tb_isim_beh.exe"/>
<file xil_pn:fileType="FILE_ISIM_MISC" xil_pn:name="mips_tb_isim_beh.wdb"/>
<file xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="mips_tb_stx_beh.prj"/>
<file xil_pn:branch="BehavioralSim" xil_pn:fileType="FILE_INI" xil_pn:name="xilinxsim.ini"/>
</files>
<transforms xmlns="http://www.xilinx.com/XMLSchema">
<transform xil_pn:end_ts="1609141316" xil_pn:name="TRAN_copyInitialToAbstractSimulation" xil_pn:start_ts="1609141316">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1609297600" xil_pn:in_ck="-2426559318869014601" xil_pn:name="TRAN_copyAbstractToPostAbstractSimulation" xil_pn:start_ts="1609297600">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="OutOfDateForOutputs"/>
<status xil_pn:value="InputChanged"/>
<status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="ALU.v"/>
<outfile xil_pn:name="CMP.v"/>
<outfile xil_pn:name="DE.v"/>
<outfile xil_pn:name="DM.v"/>
<outfile xil_pn:name="DM_.v"/>
<outfile xil_pn:name="EM.v"/>
<outfile xil_pn:name="EXT.v"/>
<outfile xil_pn:name="E_HAZARD.v"/>
<outfile xil_pn:name="FD.v"/>
<outfile xil_pn:name="GRF.v"/>
<outfile xil_pn:name="IM.v"/>
<outfile xil_pn:name="IM_TB.v"/>
<outfile xil_pn:name="MUDI.v"/>
<outfile xil_pn:name="MUDI_TB.v"/>
<outfile xil_pn:name="MW.v"/>
<outfile xil_pn:name="NPC.v"/>
<outfile xil_pn:name="PC.v"/>
<outfile xil_pn:name="PC_TB.v"/>
<outfile xil_pn:name="controller.v"/>
<outfile xil_pn:name="datapath.v"/>
<outfile xil_pn:name="gener_half.v"/>
<outfile xil_pn:name="mips.v"/>
<outfile xil_pn:name="mips_tb.v"/>
<outfile xil_pn:name="plexer.v"/>
</transform>
<transform xil_pn:end_ts="1609297600" xil_pn:name="TRAN_xawsToSimhdl" xil_pn:prop_ck="6247470219262508485" xil_pn:start_ts="1609297600">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1609297600" xil_pn:name="TRAN_schematicsToHdlSim" xil_pn:prop_ck="2413672509982659665" xil_pn:start_ts="1609297600">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1609141449" xil_pn:name="TRAN_regenerateCoresSim" xil_pn:prop_ck="-4912887098900989527" xil_pn:start_ts="1609141449">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1609297600" xil_pn:in_ck="-2426559318869014601" xil_pn:name="TRAN_copyPostAbstractToPreSimulation" xil_pn:start_ts="1609297600">
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<outfile xil_pn:name="ALU.v"/>
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<outfile xil_pn:name="NPC.v"/>
<outfile xil_pn:name="PC.v"/>
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<outfile xil_pn:name="controller.v"/>
<outfile xil_pn:name="datapath.v"/>
<outfile xil_pn:name="gener_half.v"/>
<outfile xil_pn:name="mips.v"/>
<outfile xil_pn:name="mips_tb.v"/>
<outfile xil_pn:name="plexer.v"/>
</transform>
<transform xil_pn:end_ts="1609297605" xil_pn:in_ck="-2426559318869014601" xil_pn:name="TRAN_ISimulateBehavioralModelRunFuse" xil_pn:prop_ck="1452174787333199914" xil_pn:start_ts="1609297600">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
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<status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="fuse.log"/>
<outfile xil_pn:name="isim"/>
<outfile xil_pn:name="isim.log"/>
<outfile xil_pn:name="mips_tb_beh.prj"/>
<outfile xil_pn:name="mips_tb_isim_beh.exe"/>
<outfile xil_pn:name="xilinxsim.ini"/>
</transform>
<transform xil_pn:end_ts="1609297606" xil_pn:in_ck="8038214561343329398" xil_pn:name="TRAN_ISimulateBehavioralModel" xil_pn:prop_ck="2274497516804730125" xil_pn:start_ts="1609297605">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
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<outfile xil_pn:name="isim.cmd"/>
<outfile xil_pn:name="isim.log"/>
<outfile xil_pn:name="mips_tb_isim_beh.wdb"/>
</transform>
</transforms>
</generated_project>