From 91960d7e79d383da48b2b03a8ce0c0e06b621a74 Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Thu, 17 Oct 2024 17:45:29 +0200 Subject: [PATCH 1/8] Added support for the WiFi peripheral. --- esp32/src/lib.rs | 49 ++++ esp32/src/wifi.rs | 243 ++++++++++++++++++ esp32/src/wifi/bssid_filter_addr_high.rs | 48 ++++ esp32/src/wifi/bssid_filter_addr_low.rs | 28 ++ esp32/src/wifi/bssid_filter_addr_mask_high.rs | 64 +++++ esp32/src/wifi/bssid_filter_addr_mask_low.rs | 28 ++ esp32/src/wifi/ctrl_reg.rs | 28 ++ esp32/src/wifi/ra_filter_addr_high.rs | 48 ++++ esp32/src/wifi/ra_filter_addr_low.rs | 28 ++ esp32/src/wifi/ra_filter_addr_mask_high.rs | 64 +++++ esp32/src/wifi/ra_filter_addr_mask_low.rs | 28 ++ esp32/src/wifi/rx_ctrl.rs | 48 ++++ esp32/src/wifi/rx_descr_base.rs | 28 ++ esp32/src/wifi/rx_descr_last.rs | 28 ++ esp32/src/wifi/rx_descr_next.rs | 28 ++ esp32/src/wifi/tx_complete_clear.rs | 48 ++++ esp32/src/wifi/tx_complete_status.rs | 48 ++++ esp32/src/wifi/tx_error_clear.rs | 64 +++++ esp32/src/wifi/tx_error_status.rs | 64 +++++ esp32/src/wifi/tx_slot_config.rs | 27 ++ esp32/src/wifi/tx_slot_config/config.rs | 28 ++ esp32/src/wifi/tx_slot_config/plcp0.rs | 64 +++++ esp32/src/wifi/tx_slot_parameters.rs | 58 +++++ esp32/src/wifi/tx_slot_parameters/duration.rs | 28 ++ esp32/src/wifi/tx_slot_parameters/ht_sig.rs | 28 ++ .../src/wifi/tx_slot_parameters/ht_unknown.rs | 48 ++++ esp32/src/wifi/tx_slot_parameters/plcp1.rs | 96 +++++++ esp32/src/wifi/tx_slot_parameters/plcp2.rs | 48 ++++ esp32/src/wifi/wifi_int_clear.rs | 28 ++ esp32/src/wifi/wifi_int_status.rs | 80 ++++++ esp32/svd/patches/esp32-wifi.yaml | 236 +++++++++++++++++ esp32/svd/patches/esp32.yaml | 2 + 32 files changed, 1783 insertions(+) create mode 100644 esp32/src/wifi.rs create mode 100644 esp32/src/wifi/bssid_filter_addr_high.rs create mode 100644 esp32/src/wifi/bssid_filter_addr_low.rs create mode 100644 esp32/src/wifi/bssid_filter_addr_mask_high.rs create mode 100644 esp32/src/wifi/bssid_filter_addr_mask_low.rs create mode 100644 esp32/src/wifi/ctrl_reg.rs create mode 100644 esp32/src/wifi/ra_filter_addr_high.rs create mode 100644 esp32/src/wifi/ra_filter_addr_low.rs create mode 100644 esp32/src/wifi/ra_filter_addr_mask_high.rs create mode 100644 esp32/src/wifi/ra_filter_addr_mask_low.rs create mode 100644 esp32/src/wifi/rx_ctrl.rs create mode 100644 esp32/src/wifi/rx_descr_base.rs create mode 100644 esp32/src/wifi/rx_descr_last.rs create mode 100644 esp32/src/wifi/rx_descr_next.rs create mode 100644 esp32/src/wifi/tx_complete_clear.rs create mode 100644 esp32/src/wifi/tx_complete_status.rs create mode 100644 esp32/src/wifi/tx_error_clear.rs create mode 100644 esp32/src/wifi/tx_error_status.rs create mode 100644 esp32/src/wifi/tx_slot_config.rs create mode 100644 esp32/src/wifi/tx_slot_config/config.rs create mode 100644 esp32/src/wifi/tx_slot_config/plcp0.rs create mode 100644 esp32/src/wifi/tx_slot_parameters.rs create mode 100644 esp32/src/wifi/tx_slot_parameters/duration.rs create mode 100644 esp32/src/wifi/tx_slot_parameters/ht_sig.rs create mode 100644 esp32/src/wifi/tx_slot_parameters/ht_unknown.rs create mode 100644 esp32/src/wifi/tx_slot_parameters/plcp1.rs create mode 100644 esp32/src/wifi/tx_slot_parameters/plcp2.rs create mode 100644 esp32/src/wifi/wifi_int_clear.rs create mode 100644 esp32/src/wifi/wifi_int_status.rs create mode 100644 esp32/svd/patches/esp32-wifi.yaml diff --git a/esp32/src/lib.rs b/esp32/src/lib.rs index 06f30ebe5..49f7b6b76 100644 --- a/esp32/src/lib.rs +++ b/esp32/src/lib.rs @@ -2548,6 +2548,52 @@ impl core::fmt::Debug for UHCI1 { } #[doc = "Universal Host Controller Interface 1"] pub use self::uhci0 as uhci1; +#[doc = "MAC controller for Wi-Fi peripheral"] +pub struct WIFI { + _marker: PhantomData<*const ()>, +} +unsafe impl Send for WIFI {} +impl WIFI { + #[doc = r"Pointer to the register block"] + pub const PTR: *const wifi::RegisterBlock = 0x3ff7_3000 as *const _; + #[doc = r"Return the pointer to the register block"] + #[inline(always)] + pub const fn ptr() -> *const wifi::RegisterBlock { + Self::PTR + } + #[doc = r" Steal an instance of this peripheral"] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"] + #[doc = r" that may race with any existing instances, for example by only"] + #[doc = r" accessing read-only or write-only registers, or by consuming the"] + #[doc = r" original peripheral and using critical sections to coordinate"] + #[doc = r" access between multiple new instances."] + #[doc = r""] + #[doc = r" Additionally, other software such as HALs may rely on only one"] + #[doc = r" peripheral instance existing to ensure memory safety; ensure"] + #[doc = r" no stolen instances are passed to such software."] + pub unsafe fn steal() -> Self { + Self { + _marker: PhantomData, + } + } +} +impl Deref for WIFI { + type Target = wifi::RegisterBlock; + #[inline(always)] + fn deref(&self) -> &Self::Target { + unsafe { &*Self::PTR } + } +} +impl core::fmt::Debug for WIFI { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("WIFI").finish() + } +} +#[doc = "MAC controller for Wi-Fi peripheral"] +pub mod wifi; #[no_mangle] static mut DEVICE_PERIPHERALS: bool = false; #[doc = r" All the peripherals."] @@ -2645,6 +2691,8 @@ pub struct Peripherals { pub UHCI0: UHCI0, #[doc = "UHCI1"] pub UHCI1: UHCI1, + #[doc = "WIFI"] + pub WIFI: WIFI, } impl Peripherals { #[doc = r" Returns all the peripherals *once*."] @@ -2713,6 +2761,7 @@ impl Peripherals { UART2: UART2::steal(), UHCI0: UHCI0::steal(), UHCI1: UHCI1::steal(), + WIFI: WIFI::steal(), } } } diff --git a/esp32/src/wifi.rs b/esp32/src/wifi.rs new file mode 100644 index 000000000..f51cf90f3 --- /dev/null +++ b/esp32/src/wifi.rs @@ -0,0 +1,243 @@ +#[repr(C)] +#[cfg_attr(feature = "impl-register-debug", derive(Debug))] +#[doc = "Register block"] +pub struct RegisterBlock { + bssid_filter_addr_low: BSSID_FILTER_ADDR_LOW, + bssid_filter_addr_high: BSSID_FILTER_ADDR_HIGH, + _reserved2: [u8; 0x18], + bssid_filter_addr_mask_low: BSSID_FILTER_ADDR_MASK_LOW, + bssid_filter_addr_mask_high: BSSID_FILTER_ADDR_MASK_HIGH, + _reserved4: [u8; 0x18], + ra_filter_addr_low: RA_FILTER_ADDR_LOW, + ra_filter_addr_high: RA_FILTER_ADDR_HIGH, + _reserved6: [u8; 0x18], + ra_filter_addr_mask_low: RA_FILTER_ADDR_MASK_LOW, + ra_filter_addr_mask_high: RA_FILTER_ADDR_MASK_HIGH, + _reserved8: [u8; 0x1c], + rx_ctrl: RX_CTRL, + rx_descr_base: RX_DESCR_BASE, + rx_descr_next: RX_DESCR_NEXT, + rx_descr_last: RX_DESCR_LAST, + _reserved12: [u8; 0x0bb4], + wifi_int_status: WIFI_INT_STATUS, + wifi_int_clear: WIFI_INT_CLEAR, + _reserved14: [u8; 0x68], + ctrl_reg: CTRL_REG, + tx_error_clear: TX_ERROR_CLEAR, + tx_error_status: TX_ERROR_STATUS, + tx_complete_clear: TX_COMPLETE_CLEAR, + tx_complete_status: TX_COMPLETE_STATUS, + _reserved19: [u8; 0x30], + tx_slot_config: [TX_SLOT_CONFIG; 5], + _reserved20: [u8; 0x0444], + tx_slot_parameters: [TX_SLOT_PARAMETERS; 5], +} +impl RegisterBlock { + #[doc = "0x00 - First 4 bytes of BSSID MAC address filter"] + #[inline(always)] + pub const fn bssid_filter_addr_low(&self) -> &BSSID_FILTER_ADDR_LOW { + &self.bssid_filter_addr_low + } + #[doc = "0x04 - last 2 bytes of BSSID MAC address filter"] + #[inline(always)] + pub const fn bssid_filter_addr_high(&self) -> &BSSID_FILTER_ADDR_HIGH { + &self.bssid_filter_addr_high + } + #[doc = "0x20 - mask applied to BSSID MAC address filter"] + #[inline(always)] + pub const fn bssid_filter_addr_mask_low(&self) -> &BSSID_FILTER_ADDR_MASK_LOW { + &self.bssid_filter_addr_mask_low + } + #[doc = "0x24 - mask applied to BSSID MAC address filter"] + #[inline(always)] + pub const fn bssid_filter_addr_mask_high(&self) -> &BSSID_FILTER_ADDR_MASK_HIGH { + &self.bssid_filter_addr_mask_high + } + #[doc = "0x40 - first 4 bytes of RA MAC address filter"] + #[inline(always)] + pub const fn ra_filter_addr_low(&self) -> &RA_FILTER_ADDR_LOW { + &self.ra_filter_addr_low + } + #[doc = "0x44 - last 2 bytes of RA MAC address filter"] + #[inline(always)] + pub const fn ra_filter_addr_high(&self) -> &RA_FILTER_ADDR_HIGH { + &self.ra_filter_addr_high + } + #[doc = "0x60 - mask applied to RA MAC address filter"] + #[inline(always)] + pub const fn ra_filter_addr_mask_low(&self) -> &RA_FILTER_ADDR_MASK_LOW { + &self.ra_filter_addr_mask_low + } + #[doc = "0x64 - mask applied to RA MAC address filter"] + #[inline(always)] + pub const fn ra_filter_addr_mask_high(&self) -> &RA_FILTER_ADDR_MASK_HIGH { + &self.ra_filter_addr_mask_high + } + #[doc = "0x84 - Controls the reception of frames"] + #[inline(always)] + pub const fn rx_ctrl(&self) -> &RX_CTRL { + &self.rx_ctrl + } + #[doc = "0x88 - base address of the RX DMA list"] + #[inline(always)] + pub const fn rx_descr_base(&self) -> &RX_DESCR_BASE { + &self.rx_descr_base + } + #[doc = "0x8c - next item in the RX DMA list"] + #[inline(always)] + pub const fn rx_descr_next(&self) -> &RX_DESCR_NEXT { + &self.rx_descr_next + } + #[doc = "0x90 - last item in RX DMA list"] + #[inline(always)] + pub const fn rx_descr_last(&self) -> &RX_DESCR_LAST { + &self.rx_descr_last + } + #[doc = "0xc48 - Interrupt status of WIFI peripheral"] + #[inline(always)] + pub const fn wifi_int_status(&self) -> &WIFI_INT_STATUS { + &self.wifi_int_status + } + #[doc = "0xc4c - Interrupt status clear of WIFI peripheral"] + #[inline(always)] + pub const fn wifi_int_clear(&self) -> &WIFI_INT_CLEAR { + &self.wifi_int_clear + } + #[doc = "0xcb8 - Exact name and meaning unknown, used initializing the MAC"] + #[inline(always)] + pub const fn ctrl_reg(&self) -> &CTRL_REG { + &self.ctrl_reg + } + #[doc = "0xcbc - Clear the error status of a slot"] + #[inline(always)] + pub const fn tx_error_clear(&self) -> &TX_ERROR_CLEAR { + &self.tx_error_clear + } + #[doc = "0xcc0 - Error status of a slot"] + #[inline(always)] + pub const fn tx_error_status(&self) -> &TX_ERROR_STATUS { + &self.tx_error_status + } + #[doc = "0xcc4 - "] + #[inline(always)] + pub const fn tx_complete_clear(&self) -> &TX_COMPLETE_CLEAR { + &self.tx_complete_clear + } + #[doc = "0xcc8 - "] + #[inline(always)] + pub const fn tx_complete_status(&self) -> &TX_COMPLETE_STATUS { + &self.tx_complete_status + } + #[doc = "0xcfc..0xd24 - Used to configure the TX slot."] + #[inline(always)] + pub const fn tx_slot_config(&self, n: usize) -> &TX_SLOT_CONFIG { + &self.tx_slot_config[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0xcfc..0xd24 - Used to configure the TX slot."] + #[inline(always)] + pub fn tx_slot_config_iter(&self) -> impl Iterator { + self.tx_slot_config.iter() + } + #[doc = "0x1168..0x1294 - Used to set transmission parameters for the slot"] + #[inline(always)] + pub const fn tx_slot_parameters(&self, n: usize) -> &TX_SLOT_PARAMETERS { + &self.tx_slot_parameters[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0x1168..0x1294 - Used to set transmission parameters for the slot"] + #[inline(always)] + pub fn tx_slot_parameters_iter(&self) -> impl Iterator { + self.tx_slot_parameters.iter() + } +} +#[doc = "BSSID_FILTER_ADDR_LOW (rw) register accessor: First 4 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bssid_filter_addr_low`] module"] +pub type BSSID_FILTER_ADDR_LOW = crate::Reg; +#[doc = "First 4 bytes of BSSID MAC address filter"] +pub mod bssid_filter_addr_low; +#[doc = "BSSID_FILTER_ADDR_HIGH (rw) register accessor: last 2 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bssid_filter_addr_high`] module"] +pub type BSSID_FILTER_ADDR_HIGH = crate::Reg; +#[doc = "last 2 bytes of BSSID MAC address filter"] +pub mod bssid_filter_addr_high; +#[doc = "BSSID_FILTER_ADDR_MASK_LOW (rw) register accessor: mask applied to BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_mask_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_mask_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bssid_filter_addr_mask_low`] module"] +pub type BSSID_FILTER_ADDR_MASK_LOW = + crate::Reg; +#[doc = "mask applied to BSSID MAC address filter"] +pub mod bssid_filter_addr_mask_low; +#[doc = "BSSID_FILTER_ADDR_MASK_HIGH (rw) register accessor: mask applied to BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_mask_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_mask_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bssid_filter_addr_mask_high`] module"] +pub type BSSID_FILTER_ADDR_MASK_HIGH = + crate::Reg; +#[doc = "mask applied to BSSID MAC address filter"] +pub mod bssid_filter_addr_mask_high; +#[doc = "RA_FILTER_ADDR_LOW (rw) register accessor: first 4 bytes of RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ra_filter_addr_low`] module"] +pub type RA_FILTER_ADDR_LOW = crate::Reg; +#[doc = "first 4 bytes of RA MAC address filter"] +pub mod ra_filter_addr_low; +#[doc = "RA_FILTER_ADDR_HIGH (rw) register accessor: last 2 bytes of RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ra_filter_addr_high`] module"] +pub type RA_FILTER_ADDR_HIGH = crate::Reg; +#[doc = "last 2 bytes of RA MAC address filter"] +pub mod ra_filter_addr_high; +#[doc = "RA_FILTER_ADDR_MASK_LOW (rw) register accessor: mask applied to RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_mask_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_mask_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ra_filter_addr_mask_low`] module"] +pub type RA_FILTER_ADDR_MASK_LOW = + crate::Reg; +#[doc = "mask applied to RA MAC address filter"] +pub mod ra_filter_addr_mask_low; +#[doc = "RA_FILTER_ADDR_MASK_HIGH (rw) register accessor: mask applied to RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_mask_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_mask_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ra_filter_addr_mask_high`] module"] +pub type RA_FILTER_ADDR_MASK_HIGH = + crate::Reg; +#[doc = "mask applied to RA MAC address filter"] +pub mod ra_filter_addr_mask_high; +#[doc = "RX_CTRL (rw) register accessor: Controls the reception of frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_ctrl`] module"] +pub type RX_CTRL = crate::Reg; +#[doc = "Controls the reception of frames"] +pub mod rx_ctrl; +#[doc = "RX_DESCR_BASE (rw) register accessor: base address of the RX DMA list\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_descr_base::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_descr_base::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_descr_base`] module"] +pub type RX_DESCR_BASE = crate::Reg; +#[doc = "base address of the RX DMA list"] +pub mod rx_descr_base; +#[doc = "RX_DESCR_NEXT (rw) register accessor: next item in the RX DMA list\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_descr_next::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_descr_next::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_descr_next`] module"] +pub type RX_DESCR_NEXT = crate::Reg; +#[doc = "next item in the RX DMA list"] +pub mod rx_descr_next; +#[doc = "RX_DESCR_LAST (rw) register accessor: last item in RX DMA list\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_descr_last::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_descr_last::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_descr_last`] module"] +pub type RX_DESCR_LAST = crate::Reg; +#[doc = "last item in RX DMA list"] +pub mod rx_descr_last; +#[doc = "WIFI_INT_STATUS (rw) register accessor: Interrupt status of WIFI peripheral\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_int_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_int_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_int_status`] module"] +pub type WIFI_INT_STATUS = crate::Reg; +#[doc = "Interrupt status of WIFI peripheral"] +pub mod wifi_int_status; +#[doc = "WIFI_INT_CLEAR (rw) register accessor: Interrupt status clear of WIFI peripheral\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_int_clear::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_int_clear::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_int_clear`] module"] +pub type WIFI_INT_CLEAR = crate::Reg; +#[doc = "Interrupt status clear of WIFI peripheral"] +pub mod wifi_int_clear; +#[doc = "CTRL_REG (rw) register accessor: Exact name and meaning unknown, used initializing the MAC\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl_reg`] module"] +pub type CTRL_REG = crate::Reg; +#[doc = "Exact name and meaning unknown, used initializing the MAC"] +pub mod ctrl_reg; +#[doc = "TX_ERROR_CLEAR (rw) register accessor: Clear the error status of a slot\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_error_clear::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_error_clear::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_error_clear`] module"] +pub type TX_ERROR_CLEAR = crate::Reg; +#[doc = "Clear the error status of a slot"] +pub mod tx_error_clear; +#[doc = "TX_ERROR_STATUS (rw) register accessor: Error status of a slot\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_error_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_error_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_error_status`] module"] +pub type TX_ERROR_STATUS = crate::Reg; +#[doc = "Error status of a slot"] +pub mod tx_error_status; +#[doc = "TX_COMPLETE_CLEAR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_clear::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_clear::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_complete_clear`] module"] +pub type TX_COMPLETE_CLEAR = crate::Reg; +#[doc = ""] +pub mod tx_complete_clear; +#[doc = "TX_COMPLETE_STATUS (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_complete_status`] module"] +pub type TX_COMPLETE_STATUS = crate::Reg; +#[doc = ""] +pub mod tx_complete_status; +#[doc = "Used to configure the TX slot."] +pub use self::tx_slot_config::TX_SLOT_CONFIG; +#[doc = r"Cluster"] +#[doc = "Used to configure the TX slot."] +pub mod tx_slot_config; +#[doc = "Used to set transmission parameters for the slot"] +pub use self::tx_slot_parameters::TX_SLOT_PARAMETERS; +#[doc = r"Cluster"] +#[doc = "Used to set transmission parameters for the slot"] +pub mod tx_slot_parameters; diff --git a/esp32/src/wifi/bssid_filter_addr_high.rs b/esp32/src/wifi/bssid_filter_addr_high.rs new file mode 100644 index 000000000..13ccc204e --- /dev/null +++ b/esp32/src/wifi/bssid_filter_addr_high.rs @@ -0,0 +1,48 @@ +#[doc = "Register `BSSID_FILTER_ADDR_HIGH` reader"] +pub type R = crate::R; +#[doc = "Register `BSSID_FILTER_ADDR_HIGH` writer"] +pub type W = crate::W; +#[doc = "Field `ADDR` reader - "] +pub type ADDR_R = crate::FieldReader; +#[doc = "Field `ADDR` writer - "] +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +impl R { + #[doc = "Bits 0:15"] + #[inline(always)] + pub fn addr(&self) -> ADDR_R { + ADDR_R::new((self.bits & 0xffff) as u16) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("BSSID_FILTER_ADDR_HIGH") + .field("addr", &self.addr()) + .finish() + } +} +impl W { + #[doc = "Bits 0:15"] + #[inline(always)] + #[must_use] + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 0) + } +} +#[doc = "last 2 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BSSID_FILTER_ADDR_HIGH_SPEC; +impl crate::RegisterSpec for BSSID_FILTER_ADDR_HIGH_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`bssid_filter_addr_high::R`](R) reader structure"] +impl crate::Readable for BSSID_FILTER_ADDR_HIGH_SPEC {} +#[doc = "`write(|w| ..)` method takes [`bssid_filter_addr_high::W`](W) writer structure"] +impl crate::Writable for BSSID_FILTER_ADDR_HIGH_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets BSSID_FILTER_ADDR_HIGH to value 0"] +impl crate::Resettable for BSSID_FILTER_ADDR_HIGH_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/bssid_filter_addr_low.rs b/esp32/src/wifi/bssid_filter_addr_low.rs new file mode 100644 index 000000000..d0860f49d --- /dev/null +++ b/esp32/src/wifi/bssid_filter_addr_low.rs @@ -0,0 +1,28 @@ +#[doc = "Register `BSSID_FILTER_ADDR_LOW` reader"] +pub type R = crate::R; +#[doc = "Register `BSSID_FILTER_ADDR_LOW` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "First 4 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BSSID_FILTER_ADDR_LOW_SPEC; +impl crate::RegisterSpec for BSSID_FILTER_ADDR_LOW_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`bssid_filter_addr_low::R`](R) reader structure"] +impl crate::Readable for BSSID_FILTER_ADDR_LOW_SPEC {} +#[doc = "`write(|w| ..)` method takes [`bssid_filter_addr_low::W`](W) writer structure"] +impl crate::Writable for BSSID_FILTER_ADDR_LOW_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets BSSID_FILTER_ADDR_LOW to value 0"] +impl crate::Resettable for BSSID_FILTER_ADDR_LOW_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/bssid_filter_addr_mask_high.rs b/esp32/src/wifi/bssid_filter_addr_mask_high.rs new file mode 100644 index 000000000..9d7e72267 --- /dev/null +++ b/esp32/src/wifi/bssid_filter_addr_mask_high.rs @@ -0,0 +1,64 @@ +#[doc = "Register `BSSID_FILTER_ADDR_MASK_HIGH` reader"] +pub type R = crate::R; +#[doc = "Register `BSSID_FILTER_ADDR_MASK_HIGH` writer"] +pub type W = crate::W; +#[doc = "Field `MASK` reader - "] +pub type MASK_R = crate::FieldReader; +#[doc = "Field `MASK` writer - "] +pub type MASK_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `ENABLE` reader - "] +pub type ENABLE_R = crate::BitReader; +#[doc = "Field `ENABLE` writer - "] +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; +impl R { + #[doc = "Bits 0:15"] + #[inline(always)] + pub fn mask(&self) -> MASK_R { + MASK_R::new((self.bits & 0xffff) as u16) + } + #[doc = "Bit 16"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 16) & 1) != 0) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("BSSID_FILTER_ADDR_MASK_HIGH") + .field("mask", &self.mask()) + .field("enable", &self.enable()) + .finish() + } +} +impl W { + #[doc = "Bits 0:15"] + #[inline(always)] + #[must_use] + pub fn mask(&mut self) -> MASK_W { + MASK_W::new(self, 0) + } + #[doc = "Bit 16"] + #[inline(always)] + #[must_use] + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 16) + } +} +#[doc = "mask applied to BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_mask_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_mask_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BSSID_FILTER_ADDR_MASK_HIGH_SPEC; +impl crate::RegisterSpec for BSSID_FILTER_ADDR_MASK_HIGH_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`bssid_filter_addr_mask_high::R`](R) reader structure"] +impl crate::Readable for BSSID_FILTER_ADDR_MASK_HIGH_SPEC {} +#[doc = "`write(|w| ..)` method takes [`bssid_filter_addr_mask_high::W`](W) writer structure"] +impl crate::Writable for BSSID_FILTER_ADDR_MASK_HIGH_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets BSSID_FILTER_ADDR_MASK_HIGH to value 0"] +impl crate::Resettable for BSSID_FILTER_ADDR_MASK_HIGH_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/bssid_filter_addr_mask_low.rs b/esp32/src/wifi/bssid_filter_addr_mask_low.rs new file mode 100644 index 000000000..7ee224bc0 --- /dev/null +++ b/esp32/src/wifi/bssid_filter_addr_mask_low.rs @@ -0,0 +1,28 @@ +#[doc = "Register `BSSID_FILTER_ADDR_MASK_LOW` reader"] +pub type R = crate::R; +#[doc = "Register `BSSID_FILTER_ADDR_MASK_LOW` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "mask applied to BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_mask_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_mask_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct BSSID_FILTER_ADDR_MASK_LOW_SPEC; +impl crate::RegisterSpec for BSSID_FILTER_ADDR_MASK_LOW_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`bssid_filter_addr_mask_low::R`](R) reader structure"] +impl crate::Readable for BSSID_FILTER_ADDR_MASK_LOW_SPEC {} +#[doc = "`write(|w| ..)` method takes [`bssid_filter_addr_mask_low::W`](W) writer structure"] +impl crate::Writable for BSSID_FILTER_ADDR_MASK_LOW_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets BSSID_FILTER_ADDR_MASK_LOW to value 0"] +impl crate::Resettable for BSSID_FILTER_ADDR_MASK_LOW_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/ctrl_reg.rs b/esp32/src/wifi/ctrl_reg.rs new file mode 100644 index 000000000..165f753d5 --- /dev/null +++ b/esp32/src/wifi/ctrl_reg.rs @@ -0,0 +1,28 @@ +#[doc = "Register `CTRL_REG` reader"] +pub type R = crate::R; +#[doc = "Register `CTRL_REG` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "Exact name and meaning unknown, used initializing the MAC\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CTRL_REG_SPEC; +impl crate::RegisterSpec for CTRL_REG_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`ctrl_reg::R`](R) reader structure"] +impl crate::Readable for CTRL_REG_SPEC {} +#[doc = "`write(|w| ..)` method takes [`ctrl_reg::W`](W) writer structure"] +impl crate::Writable for CTRL_REG_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets CTRL_REG to value 0"] +impl crate::Resettable for CTRL_REG_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/ra_filter_addr_high.rs b/esp32/src/wifi/ra_filter_addr_high.rs new file mode 100644 index 000000000..77ca898b1 --- /dev/null +++ b/esp32/src/wifi/ra_filter_addr_high.rs @@ -0,0 +1,48 @@ +#[doc = "Register `RA_FILTER_ADDR_HIGH` reader"] +pub type R = crate::R; +#[doc = "Register `RA_FILTER_ADDR_HIGH` writer"] +pub type W = crate::W; +#[doc = "Field `ADDR` reader - "] +pub type ADDR_R = crate::FieldReader; +#[doc = "Field `ADDR` writer - "] +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +impl R { + #[doc = "Bits 0:15"] + #[inline(always)] + pub fn addr(&self) -> ADDR_R { + ADDR_R::new((self.bits & 0xffff) as u16) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("RA_FILTER_ADDR_HIGH") + .field("addr", &self.addr()) + .finish() + } +} +impl W { + #[doc = "Bits 0:15"] + #[inline(always)] + #[must_use] + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 0) + } +} +#[doc = "last 2 bytes of RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RA_FILTER_ADDR_HIGH_SPEC; +impl crate::RegisterSpec for RA_FILTER_ADDR_HIGH_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`ra_filter_addr_high::R`](R) reader structure"] +impl crate::Readable for RA_FILTER_ADDR_HIGH_SPEC {} +#[doc = "`write(|w| ..)` method takes [`ra_filter_addr_high::W`](W) writer structure"] +impl crate::Writable for RA_FILTER_ADDR_HIGH_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets RA_FILTER_ADDR_HIGH to value 0"] +impl crate::Resettable for RA_FILTER_ADDR_HIGH_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/ra_filter_addr_low.rs b/esp32/src/wifi/ra_filter_addr_low.rs new file mode 100644 index 000000000..589c67876 --- /dev/null +++ b/esp32/src/wifi/ra_filter_addr_low.rs @@ -0,0 +1,28 @@ +#[doc = "Register `RA_FILTER_ADDR_LOW` reader"] +pub type R = crate::R; +#[doc = "Register `RA_FILTER_ADDR_LOW` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "first 4 bytes of RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RA_FILTER_ADDR_LOW_SPEC; +impl crate::RegisterSpec for RA_FILTER_ADDR_LOW_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`ra_filter_addr_low::R`](R) reader structure"] +impl crate::Readable for RA_FILTER_ADDR_LOW_SPEC {} +#[doc = "`write(|w| ..)` method takes [`ra_filter_addr_low::W`](W) writer structure"] +impl crate::Writable for RA_FILTER_ADDR_LOW_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets RA_FILTER_ADDR_LOW to value 0"] +impl crate::Resettable for RA_FILTER_ADDR_LOW_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/ra_filter_addr_mask_high.rs b/esp32/src/wifi/ra_filter_addr_mask_high.rs new file mode 100644 index 000000000..4a16a5376 --- /dev/null +++ b/esp32/src/wifi/ra_filter_addr_mask_high.rs @@ -0,0 +1,64 @@ +#[doc = "Register `RA_FILTER_ADDR_MASK_HIGH` reader"] +pub type R = crate::R; +#[doc = "Register `RA_FILTER_ADDR_MASK_HIGH` writer"] +pub type W = crate::W; +#[doc = "Field `MASK` reader - "] +pub type MASK_R = crate::FieldReader; +#[doc = "Field `MASK` writer - "] +pub type MASK_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `ENABLE` reader - "] +pub type ENABLE_R = crate::BitReader; +#[doc = "Field `ENABLE` writer - "] +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; +impl R { + #[doc = "Bits 0:15"] + #[inline(always)] + pub fn mask(&self) -> MASK_R { + MASK_R::new((self.bits & 0xffff) as u16) + } + #[doc = "Bit 16"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 16) & 1) != 0) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("RA_FILTER_ADDR_MASK_HIGH") + .field("mask", &self.mask()) + .field("enable", &self.enable()) + .finish() + } +} +impl W { + #[doc = "Bits 0:15"] + #[inline(always)] + #[must_use] + pub fn mask(&mut self) -> MASK_W { + MASK_W::new(self, 0) + } + #[doc = "Bit 16"] + #[inline(always)] + #[must_use] + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 16) + } +} +#[doc = "mask applied to RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_mask_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_mask_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RA_FILTER_ADDR_MASK_HIGH_SPEC; +impl crate::RegisterSpec for RA_FILTER_ADDR_MASK_HIGH_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`ra_filter_addr_mask_high::R`](R) reader structure"] +impl crate::Readable for RA_FILTER_ADDR_MASK_HIGH_SPEC {} +#[doc = "`write(|w| ..)` method takes [`ra_filter_addr_mask_high::W`](W) writer structure"] +impl crate::Writable for RA_FILTER_ADDR_MASK_HIGH_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets RA_FILTER_ADDR_MASK_HIGH to value 0"] +impl crate::Resettable for RA_FILTER_ADDR_MASK_HIGH_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/ra_filter_addr_mask_low.rs b/esp32/src/wifi/ra_filter_addr_mask_low.rs new file mode 100644 index 000000000..cbddf8fee --- /dev/null +++ b/esp32/src/wifi/ra_filter_addr_mask_low.rs @@ -0,0 +1,28 @@ +#[doc = "Register `RA_FILTER_ADDR_MASK_LOW` reader"] +pub type R = crate::R; +#[doc = "Register `RA_FILTER_ADDR_MASK_LOW` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "mask applied to RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_mask_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_mask_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RA_FILTER_ADDR_MASK_LOW_SPEC; +impl crate::RegisterSpec for RA_FILTER_ADDR_MASK_LOW_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`ra_filter_addr_mask_low::R`](R) reader structure"] +impl crate::Readable for RA_FILTER_ADDR_MASK_LOW_SPEC {} +#[doc = "`write(|w| ..)` method takes [`ra_filter_addr_mask_low::W`](W) writer structure"] +impl crate::Writable for RA_FILTER_ADDR_MASK_LOW_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets RA_FILTER_ADDR_MASK_LOW to value 0"] +impl crate::Resettable for RA_FILTER_ADDR_MASK_LOW_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/rx_ctrl.rs b/esp32/src/wifi/rx_ctrl.rs new file mode 100644 index 000000000..4e80981c5 --- /dev/null +++ b/esp32/src/wifi/rx_ctrl.rs @@ -0,0 +1,48 @@ +#[doc = "Register `RX_CTRL` reader"] +pub type R = crate::R; +#[doc = "Register `RX_CTRL` writer"] +pub type W = crate::W; +#[doc = "Field `RX_DESCR_RELOAD` reader - Instruct the hardware to reload the RX descriptors"] +pub type RX_DESCR_RELOAD_R = crate::BitReader; +#[doc = "Field `RX_DESCR_RELOAD` writer - Instruct the hardware to reload the RX descriptors"] +pub type RX_DESCR_RELOAD_W<'a, REG> = crate::BitWriter<'a, REG>; +impl R { + #[doc = "Bit 0 - Instruct the hardware to reload the RX descriptors"] + #[inline(always)] + pub fn rx_descr_reload(&self) -> RX_DESCR_RELOAD_R { + RX_DESCR_RELOAD_R::new((self.bits & 1) != 0) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("RX_CTRL") + .field("rx_descr_reload", &self.rx_descr_reload()) + .finish() + } +} +impl W { + #[doc = "Bit 0 - Instruct the hardware to reload the RX descriptors"] + #[inline(always)] + #[must_use] + pub fn rx_descr_reload(&mut self) -> RX_DESCR_RELOAD_W { + RX_DESCR_RELOAD_W::new(self, 0) + } +} +#[doc = "Controls the reception of frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RX_CTRL_SPEC; +impl crate::RegisterSpec for RX_CTRL_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`rx_ctrl::R`](R) reader structure"] +impl crate::Readable for RX_CTRL_SPEC {} +#[doc = "`write(|w| ..)` method takes [`rx_ctrl::W`](W) writer structure"] +impl crate::Writable for RX_CTRL_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets RX_CTRL to value 0"] +impl crate::Resettable for RX_CTRL_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/rx_descr_base.rs b/esp32/src/wifi/rx_descr_base.rs new file mode 100644 index 000000000..82707cba8 --- /dev/null +++ b/esp32/src/wifi/rx_descr_base.rs @@ -0,0 +1,28 @@ +#[doc = "Register `RX_DESCR_BASE` reader"] +pub type R = crate::R; +#[doc = "Register `RX_DESCR_BASE` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "base address of the RX DMA list\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_descr_base::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_descr_base::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RX_DESCR_BASE_SPEC; +impl crate::RegisterSpec for RX_DESCR_BASE_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`rx_descr_base::R`](R) reader structure"] +impl crate::Readable for RX_DESCR_BASE_SPEC {} +#[doc = "`write(|w| ..)` method takes [`rx_descr_base::W`](W) writer structure"] +impl crate::Writable for RX_DESCR_BASE_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets RX_DESCR_BASE to value 0"] +impl crate::Resettable for RX_DESCR_BASE_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/rx_descr_last.rs b/esp32/src/wifi/rx_descr_last.rs new file mode 100644 index 000000000..d72fdb89e --- /dev/null +++ b/esp32/src/wifi/rx_descr_last.rs @@ -0,0 +1,28 @@ +#[doc = "Register `RX_DESCR_LAST` reader"] +pub type R = crate::R; +#[doc = "Register `RX_DESCR_LAST` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "last item in RX DMA list\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_descr_last::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_descr_last::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RX_DESCR_LAST_SPEC; +impl crate::RegisterSpec for RX_DESCR_LAST_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`rx_descr_last::R`](R) reader structure"] +impl crate::Readable for RX_DESCR_LAST_SPEC {} +#[doc = "`write(|w| ..)` method takes [`rx_descr_last::W`](W) writer structure"] +impl crate::Writable for RX_DESCR_LAST_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets RX_DESCR_LAST to value 0"] +impl crate::Resettable for RX_DESCR_LAST_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/rx_descr_next.rs b/esp32/src/wifi/rx_descr_next.rs new file mode 100644 index 000000000..5af1d9910 --- /dev/null +++ b/esp32/src/wifi/rx_descr_next.rs @@ -0,0 +1,28 @@ +#[doc = "Register `RX_DESCR_NEXT` reader"] +pub type R = crate::R; +#[doc = "Register `RX_DESCR_NEXT` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "next item in the RX DMA list\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_descr_next::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_descr_next::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RX_DESCR_NEXT_SPEC; +impl crate::RegisterSpec for RX_DESCR_NEXT_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`rx_descr_next::R`](R) reader structure"] +impl crate::Readable for RX_DESCR_NEXT_SPEC {} +#[doc = "`write(|w| ..)` method takes [`rx_descr_next::W`](W) writer structure"] +impl crate::Writable for RX_DESCR_NEXT_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets RX_DESCR_NEXT to value 0"] +impl crate::Resettable for RX_DESCR_NEXT_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/tx_complete_clear.rs b/esp32/src/wifi/tx_complete_clear.rs new file mode 100644 index 000000000..5910ecfc2 --- /dev/null +++ b/esp32/src/wifi/tx_complete_clear.rs @@ -0,0 +1,48 @@ +#[doc = "Register `TX_COMPLETE_CLEAR` reader"] +pub type R = crate::R; +#[doc = "Register `TX_COMPLETE_CLEAR` writer"] +pub type W = crate::W; +#[doc = "Field `SLOTS` reader - "] +pub type SLOTS_R = crate::FieldReader; +#[doc = "Field `SLOTS` writer - "] +pub type SLOTS_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +impl R { + #[doc = "Bits 0:4"] + #[inline(always)] + pub fn slots(&self) -> SLOTS_R { + SLOTS_R::new((self.bits & 0x1f) as u8) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("TX_COMPLETE_CLEAR") + .field("slots", &self.slots()) + .finish() + } +} +impl W { + #[doc = "Bits 0:4"] + #[inline(always)] + #[must_use] + pub fn slots(&mut self) -> SLOTS_W { + SLOTS_W::new(self, 0) + } +} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_clear::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_clear::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TX_COMPLETE_CLEAR_SPEC; +impl crate::RegisterSpec for TX_COMPLETE_CLEAR_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`tx_complete_clear::R`](R) reader structure"] +impl crate::Readable for TX_COMPLETE_CLEAR_SPEC {} +#[doc = "`write(|w| ..)` method takes [`tx_complete_clear::W`](W) writer structure"] +impl crate::Writable for TX_COMPLETE_CLEAR_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets TX_COMPLETE_CLEAR to value 0"] +impl crate::Resettable for TX_COMPLETE_CLEAR_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/tx_complete_status.rs b/esp32/src/wifi/tx_complete_status.rs new file mode 100644 index 000000000..b152ea941 --- /dev/null +++ b/esp32/src/wifi/tx_complete_status.rs @@ -0,0 +1,48 @@ +#[doc = "Register `TX_COMPLETE_STATUS` reader"] +pub type R = crate::R; +#[doc = "Register `TX_COMPLETE_STATUS` writer"] +pub type W = crate::W; +#[doc = "Field `SLOTS` reader - "] +pub type SLOTS_R = crate::FieldReader; +#[doc = "Field `SLOTS` writer - "] +pub type SLOTS_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +impl R { + #[doc = "Bits 0:4"] + #[inline(always)] + pub fn slots(&self) -> SLOTS_R { + SLOTS_R::new((self.bits & 0x1f) as u8) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("TX_COMPLETE_STATUS") + .field("slots", &self.slots()) + .finish() + } +} +impl W { + #[doc = "Bits 0:4"] + #[inline(always)] + #[must_use] + pub fn slots(&mut self) -> SLOTS_W { + SLOTS_W::new(self, 0) + } +} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TX_COMPLETE_STATUS_SPEC; +impl crate::RegisterSpec for TX_COMPLETE_STATUS_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`tx_complete_status::R`](R) reader structure"] +impl crate::Readable for TX_COMPLETE_STATUS_SPEC {} +#[doc = "`write(|w| ..)` method takes [`tx_complete_status::W`](W) writer structure"] +impl crate::Writable for TX_COMPLETE_STATUS_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets TX_COMPLETE_STATUS to value 0"] +impl crate::Resettable for TX_COMPLETE_STATUS_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/tx_error_clear.rs b/esp32/src/wifi/tx_error_clear.rs new file mode 100644 index 000000000..4ac05c3b1 --- /dev/null +++ b/esp32/src/wifi/tx_error_clear.rs @@ -0,0 +1,64 @@ +#[doc = "Register `TX_ERROR_CLEAR` reader"] +pub type R = crate::R; +#[doc = "Register `TX_ERROR_CLEAR` writer"] +pub type W = crate::W; +#[doc = "Field `SLOT_COLLISION` reader - "] +pub type SLOT_COLLISION_R = crate::FieldReader; +#[doc = "Field `SLOT_COLLISION` writer - "] +pub type SLOT_COLLISION_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +#[doc = "Field `SLOT_TIMEOUT` reader - "] +pub type SLOT_TIMEOUT_R = crate::FieldReader; +#[doc = "Field `SLOT_TIMEOUT` writer - "] +pub type SLOT_TIMEOUT_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +impl R { + #[doc = "Bits 0:4"] + #[inline(always)] + pub fn slot_collision(&self) -> SLOT_COLLISION_R { + SLOT_COLLISION_R::new((self.bits & 0x1f) as u8) + } + #[doc = "Bits 16:20"] + #[inline(always)] + pub fn slot_timeout(&self) -> SLOT_TIMEOUT_R { + SLOT_TIMEOUT_R::new(((self.bits >> 16) & 0x1f) as u8) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("TX_ERROR_CLEAR") + .field("slot_collision", &self.slot_collision()) + .field("slot_timeout", &self.slot_timeout()) + .finish() + } +} +impl W { + #[doc = "Bits 0:4"] + #[inline(always)] + #[must_use] + pub fn slot_collision(&mut self) -> SLOT_COLLISION_W { + SLOT_COLLISION_W::new(self, 0) + } + #[doc = "Bits 16:20"] + #[inline(always)] + #[must_use] + pub fn slot_timeout(&mut self) -> SLOT_TIMEOUT_W { + SLOT_TIMEOUT_W::new(self, 16) + } +} +#[doc = "Clear the error status of a slot\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_error_clear::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_error_clear::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TX_ERROR_CLEAR_SPEC; +impl crate::RegisterSpec for TX_ERROR_CLEAR_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`tx_error_clear::R`](R) reader structure"] +impl crate::Readable for TX_ERROR_CLEAR_SPEC {} +#[doc = "`write(|w| ..)` method takes [`tx_error_clear::W`](W) writer structure"] +impl crate::Writable for TX_ERROR_CLEAR_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets TX_ERROR_CLEAR to value 0"] +impl crate::Resettable for TX_ERROR_CLEAR_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/tx_error_status.rs b/esp32/src/wifi/tx_error_status.rs new file mode 100644 index 000000000..97c942667 --- /dev/null +++ b/esp32/src/wifi/tx_error_status.rs @@ -0,0 +1,64 @@ +#[doc = "Register `TX_ERROR_STATUS` reader"] +pub type R = crate::R; +#[doc = "Register `TX_ERROR_STATUS` writer"] +pub type W = crate::W; +#[doc = "Field `SLOT_COLLISION` reader - "] +pub type SLOT_COLLISION_R = crate::FieldReader; +#[doc = "Field `SLOT_COLLISION` writer - "] +pub type SLOT_COLLISION_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +#[doc = "Field `SLOT_TIMEOUT` reader - "] +pub type SLOT_TIMEOUT_R = crate::FieldReader; +#[doc = "Field `SLOT_TIMEOUT` writer - "] +pub type SLOT_TIMEOUT_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +impl R { + #[doc = "Bits 0:4"] + #[inline(always)] + pub fn slot_collision(&self) -> SLOT_COLLISION_R { + SLOT_COLLISION_R::new((self.bits & 0x1f) as u8) + } + #[doc = "Bits 16:20"] + #[inline(always)] + pub fn slot_timeout(&self) -> SLOT_TIMEOUT_R { + SLOT_TIMEOUT_R::new(((self.bits >> 16) & 0x1f) as u8) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("TX_ERROR_STATUS") + .field("slot_collision", &self.slot_collision()) + .field("slot_timeout", &self.slot_timeout()) + .finish() + } +} +impl W { + #[doc = "Bits 0:4"] + #[inline(always)] + #[must_use] + pub fn slot_collision(&mut self) -> SLOT_COLLISION_W { + SLOT_COLLISION_W::new(self, 0) + } + #[doc = "Bits 16:20"] + #[inline(always)] + #[must_use] + pub fn slot_timeout(&mut self) -> SLOT_TIMEOUT_W { + SLOT_TIMEOUT_W::new(self, 16) + } +} +#[doc = "Error status of a slot\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_error_status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_error_status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TX_ERROR_STATUS_SPEC; +impl crate::RegisterSpec for TX_ERROR_STATUS_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`tx_error_status::R`](R) reader structure"] +impl crate::Readable for TX_ERROR_STATUS_SPEC {} +#[doc = "`write(|w| ..)` method takes [`tx_error_status::W`](W) writer structure"] +impl crate::Writable for TX_ERROR_STATUS_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets TX_ERROR_STATUS to value 0"] +impl crate::Resettable for TX_ERROR_STATUS_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/tx_slot_config.rs b/esp32/src/wifi/tx_slot_config.rs new file mode 100644 index 000000000..0be327650 --- /dev/null +++ b/esp32/src/wifi/tx_slot_config.rs @@ -0,0 +1,27 @@ +#[repr(C)] +#[cfg_attr(feature = "impl-register-debug", derive(Debug))] +#[doc = "Used to configure the TX slot."] +pub struct TX_SLOT_CONFIG { + config: CONFIG, + plcp0: PLCP0, +} +impl TX_SLOT_CONFIG { + #[doc = "0x00 - Config"] + #[inline(always)] + pub const fn config(&self) -> &CONFIG { + &self.config + } + #[doc = "0x04 - PLCP0"] + #[inline(always)] + pub const fn plcp0(&self) -> &PLCP0 { + &self.plcp0 + } +} +#[doc = "CONFIG (rw) register accessor: Config\n\nYou can [`read`](crate::Reg::read) this register and get [`config::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`config::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@config`] module"] +pub type CONFIG = crate::Reg; +#[doc = "Config"] +pub mod config; +#[doc = "PLCP0 (rw) register accessor: PLCP0\n\nYou can [`read`](crate::Reg::read) this register and get [`plcp0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`plcp0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@plcp0`] module"] +pub type PLCP0 = crate::Reg; +#[doc = "PLCP0"] +pub mod plcp0; diff --git a/esp32/src/wifi/tx_slot_config/config.rs b/esp32/src/wifi/tx_slot_config/config.rs new file mode 100644 index 000000000..bb05683ad --- /dev/null +++ b/esp32/src/wifi/tx_slot_config/config.rs @@ -0,0 +1,28 @@ +#[doc = "Register `CONFIG` reader"] +pub type R = crate::R; +#[doc = "Register `CONFIG` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "Config\n\nYou can [`read`](crate::Reg::read) this register and get [`config::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`config::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CONFIG_SPEC; +impl crate::RegisterSpec for CONFIG_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`config::R`](R) reader structure"] +impl crate::Readable for CONFIG_SPEC {} +#[doc = "`write(|w| ..)` method takes [`config::W`](W) writer structure"] +impl crate::Writable for CONFIG_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets CONFIG to value 0"] +impl crate::Resettable for CONFIG_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/tx_slot_config/plcp0.rs b/esp32/src/wifi/tx_slot_config/plcp0.rs new file mode 100644 index 000000000..11e8f1bc9 --- /dev/null +++ b/esp32/src/wifi/tx_slot_config/plcp0.rs @@ -0,0 +1,64 @@ +#[doc = "Register `PLCP0` reader"] +pub type R = crate::R; +#[doc = "Register `PLCP0` writer"] +pub type W = crate::W; +#[doc = "Field `DMA_ADDR` reader - Bottom bits of address of dma_item"] +pub type DMA_ADDR_R = crate::FieldReader; +#[doc = "Field `DMA_ADDR` writer - Bottom bits of address of dma_item"] +pub type DMA_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `FLAGS` reader - Flags for the SLOT"] +pub type FLAGS_R = crate::FieldReader; +#[doc = "Field `FLAGS` writer - Flags for the SLOT"] +pub type FLAGS_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +impl R { + #[doc = "Bits 0:19 - Bottom bits of address of dma_item"] + #[inline(always)] + pub fn dma_addr(&self) -> DMA_ADDR_R { + DMA_ADDR_R::new(self.bits & 0x000f_ffff) + } + #[doc = "Bits 20:31 - Flags for the SLOT"] + #[inline(always)] + pub fn flags(&self) -> FLAGS_R { + FLAGS_R::new(((self.bits >> 20) & 0x0fff) as u16) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("PLCP0") + .field("dma_addr", &self.dma_addr()) + .field("flags", &self.flags()) + .finish() + } +} +impl W { + #[doc = "Bits 0:19 - Bottom bits of address of dma_item"] + #[inline(always)] + #[must_use] + pub fn dma_addr(&mut self) -> DMA_ADDR_W { + DMA_ADDR_W::new(self, 0) + } + #[doc = "Bits 20:31 - Flags for the SLOT"] + #[inline(always)] + #[must_use] + pub fn flags(&mut self) -> FLAGS_W { + FLAGS_W::new(self, 20) + } +} +#[doc = "PLCP0\n\nYou can [`read`](crate::Reg::read) this register and get [`plcp0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`plcp0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PLCP0_SPEC; +impl crate::RegisterSpec for PLCP0_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`plcp0::R`](R) reader structure"] +impl crate::Readable for PLCP0_SPEC {} +#[doc = "`write(|w| ..)` method takes [`plcp0::W`](W) writer structure"] +impl crate::Writable for PLCP0_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets PLCP0 to value 0"] +impl crate::Resettable for PLCP0_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/tx_slot_parameters.rs b/esp32/src/wifi/tx_slot_parameters.rs new file mode 100644 index 000000000..0464d208d --- /dev/null +++ b/esp32/src/wifi/tx_slot_parameters.rs @@ -0,0 +1,58 @@ +#[repr(C)] +#[cfg_attr(feature = "impl-register-debug", derive(Debug))] +#[doc = "Used to set transmission parameters for the slot"] +pub struct TX_SLOT_PARAMETERS { + plcp1: PLCP1, + plcp2: PLCP2, + ht_sig: HT_SIG, + ht_unknown: HT_UNKNOWN, + duration: DURATION, + _reserved_end: [u8; 0x28], +} +impl TX_SLOT_PARAMETERS { + #[doc = "0x00 - PLCP1"] + #[inline(always)] + pub const fn plcp1(&self) -> &PLCP1 { + &self.plcp1 + } + #[doc = "0x04 - PLCP2"] + #[inline(always)] + pub const fn plcp2(&self) -> &PLCP2 { + &self.plcp2 + } + #[doc = "0x08 - HT-SIG field in HT preamble"] + #[inline(always)] + pub const fn ht_sig(&self) -> &HT_SIG { + &self.ht_sig + } + #[doc = "0x0c - exact meaning and name unknown, related to HT"] + #[inline(always)] + pub const fn ht_unknown(&self) -> &HT_UNKNOWN { + &self.ht_unknown + } + #[doc = "0x10 - duration of the frame exchange"] + #[inline(always)] + pub const fn duration(&self) -> &DURATION { + &self.duration + } +} +#[doc = "PLCP1 (rw) register accessor: PLCP1\n\nYou can [`read`](crate::Reg::read) this register and get [`plcp1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`plcp1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@plcp1`] module"] +pub type PLCP1 = crate::Reg; +#[doc = "PLCP1"] +pub mod plcp1; +#[doc = "PLCP2 (rw) register accessor: PLCP2\n\nYou can [`read`](crate::Reg::read) this register and get [`plcp2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`plcp2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@plcp2`] module"] +pub type PLCP2 = crate::Reg; +#[doc = "PLCP2"] +pub mod plcp2; +#[doc = "HT_SIG (rw) register accessor: HT-SIG field in HT preamble\n\nYou can [`read`](crate::Reg::read) this register and get [`ht_sig::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ht_sig::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ht_sig`] module"] +pub type HT_SIG = crate::Reg; +#[doc = "HT-SIG field in HT preamble"] +pub mod ht_sig; +#[doc = "HT_UNKNOWN (rw) register accessor: exact meaning and name unknown, related to HT\n\nYou can [`read`](crate::Reg::read) this register and get [`ht_unknown::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ht_unknown::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ht_unknown`] module"] +pub type HT_UNKNOWN = crate::Reg; +#[doc = "exact meaning and name unknown, related to HT"] +pub mod ht_unknown; +#[doc = "DURATION (rw) register accessor: duration of the frame exchange\n\nYou can [`read`](crate::Reg::read) this register and get [`duration::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`duration::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@duration`] module"] +pub type DURATION = crate::Reg; +#[doc = "duration of the frame exchange"] +pub mod duration; diff --git a/esp32/src/wifi/tx_slot_parameters/duration.rs b/esp32/src/wifi/tx_slot_parameters/duration.rs new file mode 100644 index 000000000..4dd9bf06c --- /dev/null +++ b/esp32/src/wifi/tx_slot_parameters/duration.rs @@ -0,0 +1,28 @@ +#[doc = "Register `DURATION` reader"] +pub type R = crate::R; +#[doc = "Register `DURATION` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "duration of the frame exchange\n\nYou can [`read`](crate::Reg::read) this register and get [`duration::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`duration::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct DURATION_SPEC; +impl crate::RegisterSpec for DURATION_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`duration::R`](R) reader structure"] +impl crate::Readable for DURATION_SPEC {} +#[doc = "`write(|w| ..)` method takes [`duration::W`](W) writer structure"] +impl crate::Writable for DURATION_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets DURATION to value 0"] +impl crate::Resettable for DURATION_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/tx_slot_parameters/ht_sig.rs b/esp32/src/wifi/tx_slot_parameters/ht_sig.rs new file mode 100644 index 000000000..98c75905e --- /dev/null +++ b/esp32/src/wifi/tx_slot_parameters/ht_sig.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HT_SIG` reader"] +pub type R = crate::R; +#[doc = "Register `HT_SIG` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "HT-SIG field in HT preamble\n\nYou can [`read`](crate::Reg::read) this register and get [`ht_sig::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ht_sig::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HT_SIG_SPEC; +impl crate::RegisterSpec for HT_SIG_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`ht_sig::R`](R) reader structure"] +impl crate::Readable for HT_SIG_SPEC {} +#[doc = "`write(|w| ..)` method takes [`ht_sig::W`](W) writer structure"] +impl crate::Writable for HT_SIG_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HT_SIG to value 0"] +impl crate::Resettable for HT_SIG_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/tx_slot_parameters/ht_unknown.rs b/esp32/src/wifi/tx_slot_parameters/ht_unknown.rs new file mode 100644 index 000000000..7b5ab8ada --- /dev/null +++ b/esp32/src/wifi/tx_slot_parameters/ht_unknown.rs @@ -0,0 +1,48 @@ +#[doc = "Register `HT_UNKNOWN` reader"] +pub type R = crate::R; +#[doc = "Register `HT_UNKNOWN` writer"] +pub type W = crate::W; +#[doc = "Field `LENGTH` reader - The length of the PPDU"] +pub type LENGTH_R = crate::FieldReader; +#[doc = "Field `LENGTH` writer - The length of the PPDU"] +pub type LENGTH_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +impl R { + #[doc = "Bits 0:19 - The length of the PPDU"] + #[inline(always)] + pub fn length(&self) -> LENGTH_R { + LENGTH_R::new(self.bits & 0x000f_ffff) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("HT_UNKNOWN") + .field("length", &self.length()) + .finish() + } +} +impl W { + #[doc = "Bits 0:19 - The length of the PPDU"] + #[inline(always)] + #[must_use] + pub fn length(&mut self) -> LENGTH_W { + LENGTH_W::new(self, 0) + } +} +#[doc = "exact meaning and name unknown, related to HT\n\nYou can [`read`](crate::Reg::read) this register and get [`ht_unknown::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ht_unknown::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HT_UNKNOWN_SPEC; +impl crate::RegisterSpec for HT_UNKNOWN_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`ht_unknown::R`](R) reader structure"] +impl crate::Readable for HT_UNKNOWN_SPEC {} +#[doc = "`write(|w| ..)` method takes [`ht_unknown::W`](W) writer structure"] +impl crate::Writable for HT_UNKNOWN_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HT_UNKNOWN to value 0"] +impl crate::Resettable for HT_UNKNOWN_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/tx_slot_parameters/plcp1.rs b/esp32/src/wifi/tx_slot_parameters/plcp1.rs new file mode 100644 index 000000000..426aba18c --- /dev/null +++ b/esp32/src/wifi/tx_slot_parameters/plcp1.rs @@ -0,0 +1,96 @@ +#[doc = "Register `PLCP1` reader"] +pub type R = crate::R; +#[doc = "Register `PLCP1` writer"] +pub type W = crate::W; +#[doc = "Field `LEN` reader - Length of packet (in bytes)"] +pub type LEN_R = crate::FieldReader; +#[doc = "Field `LEN` writer - Length of packet (in bytes)"] +pub type LEN_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +#[doc = "Field `RATE` reader - Packet rate (see wifi_phy_rate_t)"] +pub type RATE_R = crate::FieldReader; +#[doc = "Field `RATE` writer - Packet rate (see wifi_phy_rate_t)"] +pub type RATE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +#[doc = "Field `IS_80211_N` reader - Bit indicating if this is 802.11n"] +pub type IS_80211_N_R = crate::BitReader; +#[doc = "Field `IS_80211_N` writer - Bit indicating if this is 802.11n"] +pub type IS_80211_N_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `UNKNOWN_ENABLE` reader - meaning unknown, set to one for TX"] +pub type UNKNOWN_ENABLE_R = crate::FieldReader; +#[doc = "Field `UNKNOWN_ENABLE` writer - meaning unknown, set to one for TX"] +pub type UNKNOWN_ENABLE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +impl R { + #[doc = "Bits 0:11 - Length of packet (in bytes)"] + #[inline(always)] + pub fn len(&self) -> LEN_R { + LEN_R::new((self.bits & 0x0fff) as u16) + } + #[doc = "Bits 12:16 - Packet rate (see wifi_phy_rate_t)"] + #[inline(always)] + pub fn rate(&self) -> RATE_R { + RATE_R::new(((self.bits >> 12) & 0x1f) as u8) + } + #[doc = "Bit 25 - Bit indicating if this is 802.11n"] + #[inline(always)] + pub fn is_80211_n(&self) -> IS_80211_N_R { + IS_80211_N_R::new(((self.bits >> 25) & 1) != 0) + } + #[doc = "Bits 28:29 - meaning unknown, set to one for TX"] + #[inline(always)] + pub fn unknown_enable(&self) -> UNKNOWN_ENABLE_R { + UNKNOWN_ENABLE_R::new(((self.bits >> 28) & 3) as u8) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("PLCP1") + .field("len", &self.len()) + .field("rate", &self.rate()) + .field("is_80211_n", &self.is_80211_n()) + .field("unknown_enable", &self.unknown_enable()) + .finish() + } +} +impl W { + #[doc = "Bits 0:11 - Length of packet (in bytes)"] + #[inline(always)] + #[must_use] + pub fn len(&mut self) -> LEN_W { + LEN_W::new(self, 0) + } + #[doc = "Bits 12:16 - Packet rate (see wifi_phy_rate_t)"] + #[inline(always)] + #[must_use] + pub fn rate(&mut self) -> RATE_W { + RATE_W::new(self, 12) + } + #[doc = "Bit 25 - Bit indicating if this is 802.11n"] + #[inline(always)] + #[must_use] + pub fn is_80211_n(&mut self) -> IS_80211_N_W { + IS_80211_N_W::new(self, 25) + } + #[doc = "Bits 28:29 - meaning unknown, set to one for TX"] + #[inline(always)] + #[must_use] + pub fn unknown_enable(&mut self) -> UNKNOWN_ENABLE_W { + UNKNOWN_ENABLE_W::new(self, 28) + } +} +#[doc = "PLCP1\n\nYou can [`read`](crate::Reg::read) this register and get [`plcp1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`plcp1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PLCP1_SPEC; +impl crate::RegisterSpec for PLCP1_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`plcp1::R`](R) reader structure"] +impl crate::Readable for PLCP1_SPEC {} +#[doc = "`write(|w| ..)` method takes [`plcp1::W`](W) writer structure"] +impl crate::Writable for PLCP1_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets PLCP1 to value 0"] +impl crate::Resettable for PLCP1_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/tx_slot_parameters/plcp2.rs b/esp32/src/wifi/tx_slot_parameters/plcp2.rs new file mode 100644 index 000000000..b59bc2ab2 --- /dev/null +++ b/esp32/src/wifi/tx_slot_parameters/plcp2.rs @@ -0,0 +1,48 @@ +#[doc = "Register `PLCP2` reader"] +pub type R = crate::R; +#[doc = "Register `PLCP2` writer"] +pub type W = crate::W; +#[doc = "Field `UNKNOWN` reader - meaning unknown, set to one for TX"] +pub type UNKNOWN_R = crate::BitReader; +#[doc = "Field `UNKNOWN` writer - meaning unknown, set to one for TX"] +pub type UNKNOWN_W<'a, REG> = crate::BitWriter<'a, REG>; +impl R { + #[doc = "Bit 5 - meaning unknown, set to one for TX"] + #[inline(always)] + pub fn unknown(&self) -> UNKNOWN_R { + UNKNOWN_R::new(((self.bits >> 5) & 1) != 0) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("PLCP2") + .field("unknown", &self.unknown()) + .finish() + } +} +impl W { + #[doc = "Bit 5 - meaning unknown, set to one for TX"] + #[inline(always)] + #[must_use] + pub fn unknown(&mut self) -> UNKNOWN_W { + UNKNOWN_W::new(self, 5) + } +} +#[doc = "PLCP2\n\nYou can [`read`](crate::Reg::read) this register and get [`plcp2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`plcp2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PLCP2_SPEC; +impl crate::RegisterSpec for PLCP2_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`plcp2::R`](R) reader structure"] +impl crate::Readable for PLCP2_SPEC {} +#[doc = "`write(|w| ..)` method takes [`plcp2::W`](W) writer structure"] +impl crate::Writable for PLCP2_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets PLCP2 to value 0"] +impl crate::Resettable for PLCP2_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/wifi_int_clear.rs b/esp32/src/wifi/wifi_int_clear.rs new file mode 100644 index 000000000..691fb12a0 --- /dev/null +++ b/esp32/src/wifi/wifi_int_clear.rs @@ -0,0 +1,28 @@ +#[doc = "Register `WIFI_INT_CLEAR` reader"] +pub type R = crate::R; +#[doc = "Register `WIFI_INT_CLEAR` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "Interrupt status clear of WIFI peripheral\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_int_clear::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_int_clear::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WIFI_INT_CLEAR_SPEC; +impl crate::RegisterSpec for WIFI_INT_CLEAR_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`wifi_int_clear::R`](R) reader structure"] +impl crate::Readable for WIFI_INT_CLEAR_SPEC {} +#[doc = "`write(|w| ..)` method takes [`wifi_int_clear::W`](W) writer structure"] +impl crate::Writable for WIFI_INT_CLEAR_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets WIFI_INT_CLEAR to value 0"] +impl crate::Resettable for WIFI_INT_CLEAR_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/wifi_int_status.rs b/esp32/src/wifi/wifi_int_status.rs new file mode 100644 index 000000000..b06fffa7b --- /dev/null +++ b/esp32/src/wifi/wifi_int_status.rs @@ -0,0 +1,80 @@ +#[doc = "Register `WIFI_INT_STATUS` reader"] +pub type R = crate::R; +#[doc = "Register `WIFI_INT_STATUS` writer"] +pub type W = crate::W; +#[doc = "Field `TXQ_COMPLETE` reader - Indicates the completion of a transmission"] +pub type TXQ_COMPLETE_R = crate::BitReader; +#[doc = "Field `TXQ_COMPLETE` writer - Indicates the completion of a transmission"] +pub type TXQ_COMPLETE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXQ_COLLISION` reader - Indicates a collision, while transmitting"] +pub type TXQ_COLLISION_R = crate::BitReader; +#[doc = "Field `TXQ_COLLISION` writer - Indicates a collision, while transmitting"] +pub type TXQ_COLLISION_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `TXQ_TIMEOUT` reader - Indicates a timeout, while transmitting"] +pub type TXQ_TIMEOUT_R = crate::BitReader; +#[doc = "Field `TXQ_TIMEOUT` writer - Indicates a timeout, while transmitting"] +pub type TXQ_TIMEOUT_W<'a, REG> = crate::BitWriter<'a, REG>; +impl R { + #[doc = "Bit 7 - Indicates the completion of a transmission"] + #[inline(always)] + pub fn txq_complete(&self) -> TXQ_COMPLETE_R { + TXQ_COMPLETE_R::new(((self.bits >> 7) & 1) != 0) + } + #[doc = "Bit 8 - Indicates a collision, while transmitting"] + #[inline(always)] + pub fn txq_collision(&self) -> TXQ_COLLISION_R { + TXQ_COLLISION_R::new(((self.bits >> 8) & 1) != 0) + } + #[doc = "Bit 19 - Indicates a timeout, while transmitting"] + #[inline(always)] + pub fn txq_timeout(&self) -> TXQ_TIMEOUT_R { + TXQ_TIMEOUT_R::new(((self.bits >> 19) & 1) != 0) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("WIFI_INT_STATUS") + .field("txq_complete", &self.txq_complete()) + .field("txq_collision", &self.txq_collision()) + .field("txq_timeout", &self.txq_timeout()) + .finish() + } +} +impl W { + #[doc = "Bit 7 - Indicates the completion of a transmission"] + #[inline(always)] + #[must_use] + pub fn txq_complete(&mut self) -> TXQ_COMPLETE_W { + TXQ_COMPLETE_W::new(self, 7) + } + #[doc = "Bit 8 - Indicates a collision, while transmitting"] + #[inline(always)] + #[must_use] + pub fn txq_collision(&mut self) -> TXQ_COLLISION_W { + TXQ_COLLISION_W::new(self, 8) + } + #[doc = "Bit 19 - Indicates a timeout, while transmitting"] + #[inline(always)] + #[must_use] + pub fn txq_timeout(&mut self) -> TXQ_TIMEOUT_W { + TXQ_TIMEOUT_W::new(self, 19) + } +} +#[doc = "Interrupt status of WIFI peripheral\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_int_status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_int_status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct WIFI_INT_STATUS_SPEC; +impl crate::RegisterSpec for WIFI_INT_STATUS_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`wifi_int_status::R`](R) reader structure"] +impl crate::Readable for WIFI_INT_STATUS_SPEC {} +#[doc = "`write(|w| ..)` method takes [`wifi_int_status::W`](W) writer structure"] +impl crate::Writable for WIFI_INT_STATUS_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets WIFI_INT_STATUS to value 0"] +impl crate::Resettable for WIFI_INT_STATUS_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/svd/patches/esp32-wifi.yaml b/esp32/svd/patches/esp32-wifi.yaml new file mode 100644 index 000000000..4f93e5fc1 --- /dev/null +++ b/esp32/svd/patches/esp32-wifi.yaml @@ -0,0 +1,236 @@ + + +# This is a patch against the SVD provided by Espressif +# Patchfile for use with https://github.com/rust-embedded/svdtools +# Expects the svd repo to be cloned in the directory next to this repo +# Then run `svd patch esp32-wifi.yaml` in this directory, the patched file will be in ../svd/svd/ +_add: + WIFI: + description: MAC controller for Wi-Fi peripheral + groupName: WIFI + baseAddress: 0x3ff73000 + size: 32 + addressBlock: + offset: 0x0 + size: 0x2000 + usage: registers + registers: + BSSID_FILTER_ADDR_LOW: + description: First 4 bytes of BSSID MAC address filter + addressOffset: 0x0 + access: read-write + BSSID_FILTER_ADDR_HIGH: + description: last 2 bytes of BSSID MAC address filter + addressOffset: 0x4 + fields: + ADDR: + bitOffset: 0 + bitWidth: 16 + BSSID_FILTER_ADDR_MASK_LOW: + description: mask applied to BSSID MAC address filter + addressOffset: 0x20 + access: read-write + BSSID_FILTER_ADDR_MASK_HIGH: + description: mask applied to BSSID MAC address filter + addressOffset: 0x24 + access: read-write + fields: + MASK: + bitOffset: 0 + bitWidth: 16 + ENABLE: + bitOffset: 16 + bitWidth: 1 + RA_FILTER_ADDR_LOW: + description: first 4 bytes of RA MAC address filter + addressOffset: 0x40 + access: read-write + RA_FILTER_ADDR_HIGH: + description: last 2 bytes of RA MAC address filter + addressOffset: 0x44 + fields: + ADDR: + bitOffset: 0 + bitWidth: 16 + RA_FILTER_ADDR_MASK_LOW: + description: mask applied to RA MAC address filter + addressOffset: 0x60 + access: read-write + RA_FILTER_ADDR_MASK_HIGH: + description: mask applied to RA MAC address filter + addressOffset: 0x64 + access: read-write + fields: + MASK: + bitOffset: 0 + bitWidth: 16 + ENABLE: + bitOffset: 16 + bitWidth: 1 + RX_CTRL: + description: Controls the reception of frames + addressOffset: 0x84 + access: read-write + fields: + RX_DESCR_RELOAD: + bitOffset: 0 + bitWidth: 1 + description: Instruct the hardware to reload the RX descriptors + RX_DESCR_BASE: + description: base address of the RX DMA list + addressOffset: 0x88 + acccess: read-write + RX_DESCR_NEXT: + description: next item in the RX DMA list + addressOffset: 0x8c + access: read-write + RX_DESCR_LAST: + description: last item in RX DMA list + addressOffset: 0x90 + access: read-write + WIFI_INT_STATUS: + description: Interrupt status of WIFI peripheral + addressOffset: 0xc48 + access: read + fields: + TXQ_COMPLETE: + description: Indicates the completion of a transmission + bitOffset: 7 + bitWidth: 1 + TXQ_COLLISION: + description: Indicates a collision, while transmitting + bitOffset: 8 + bitWidth: 1 + TXQ_TIMEOUT: + description: Indicates a timeout, while transmitting + bitOffset: 19 + bitWidth: 1 + WIFI_INT_CLEAR: + description: Interrupt status clear of WIFI peripheral + addressOffset: 0xc4c + access: write + CTRL_REG: + description: Exact name and meaning unknown, used initializing the MAC + addressOffset: 0xcb8 + access: read-write + TX_ERROR_CLEAR: + description: Clear the error status of a slot + addressOffset: 0xcbc + access: write + fields: + SLOT_COLLISION: + bitOffset: 0 + bitWidth: 5 + SLOT_TIMEOUT: + bitOffset: 0x10 + bitWidth: 5 + TX_ERROR_STATUS: + description: Error status of a slot + addressOffset: 0xcc0 + access: read + fields: + SLOT_COLLISION: + bitOffset: 0 + bitWidth: 5 + SLOT_TIMEOUT: + bitOffset: 0x10 + bitWidth: 5 + TX_COMPLETE_CLEAR: + description: Clear the completion status of a slot + addressOffset: 0xcc4 + access: write + fields: + SLOTS: + bitOffset: 0 + bitWidth: 5 + TX_COMPLETE_STATUS: + description: Completion status of a slot + addressOffset: 0xcc8 + access: read + fields: + SLOTS: + bitOffset: 0 + bitWidth: 5 +WIFI: + _add: + _clusters: + TX_SLOT_CONFIG%s: + dim: 5 + dimIncrement: 0x8 + description: Used to configure the TX slot. + addressOffset: 0xcfc + access: read-write + registers: + CONFIG: + description: Config + addressOffset: 0x0 + access: read-write + PLCP0: + description: PLCP0 + addressOffset: 0x4 + access: read-write + fields: + DMA_ADDR: + description: Bottom bits of address of dma_item + bitOffset: 0 + bitWidth: 20 + access: write + FLAGS: + description: Flags for the SLOT + bitOffset: 20 + bitWidth: 12 + access: read-write + TX_SLOT_PARAMETERS%s: + dim: 5 + dimIncrement: 0x3c + addressOffset: 0x1168 + description: Used to set transmission parameters for the slot + registers: + PLCP1: + description: PLCP1 + addressOffset: 0x0 + access: read-write + fields: + LEN: + description: Length of packet (in bytes) + bitOffset: 0 + bitWidth: 12 + RATE: + description: Packet rate (see wifi_phy_rate_t) + bitOffset: 12 + bitWidth: 5 + IS_80211_N: + description: Bit indicating if this is 802.11n + bitOffset: 25 + bitWidth: 1 + UNKNOWN_ENABLE: + description: meaning unknown, set to one for TX + bitOffset: 28 + bitWidth: 2 + PLCP2: + description: PLCP2 + addressOffset: 0x4 + access: read-write + fields: + UNKNOWN: + description: meaning unknown, set to one for TX + bitOffset: 5 + bitWidth: 1 + HT_SIG: + description: HT-SIG field in HT preamble + addressOffset: 0x8 + access: read-write + HT_UNKNOWN: + description: exact meaning and name unknown, related to HT + addressOffset: 0xc + access: read-write + fields: + LENGTH: + description: The length of the PPDU + bitOffset: 0x0 + bitWidth: 20 + access: write + DURATION: + description: duration of the frame exchange + addressOffset: 0x10 + access: read-write diff --git a/esp32/svd/patches/esp32.yaml b/esp32/svd/patches/esp32.yaml index 93fb0ae03..6355a0027 100644 --- a/esp32/svd/patches/esp32.yaml +++ b/esp32/svd/patches/esp32.yaml @@ -209,3 +209,5 @@ TWAI0: description: "THIS IS NOT AN INTERRUPT. brp_div will prescale BRP by 2. Only available on ESP32 Revision 2 or later. Reserved otherwise" bitOffset: 4 bitWidth: 1 +_include: + - "esp32-wifi.yaml" From e454e797a4a57f050f47c14b726ca07b0bcea675 Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Sun, 20 Oct 2024 16:11:39 +0200 Subject: [PATCH 2/8] Added basic crypto and cleaned up filtering. --- esp32/src/wifi.rs | 169 +++++++----------- esp32/src/wifi/bssid_filter_addr_high.rs | 48 ----- esp32/src/wifi/bssid_filter_addr_low.rs | 28 --- esp32/src/wifi/bssid_filter_addr_mask_high.rs | 64 ------- esp32/src/wifi/bssid_filter_addr_mask_low.rs | 28 --- esp32/src/wifi/crypto_key_entry.rs | 28 +++ esp32/src/wifi/crypto_key_entry/addr_high.rs | 96 ++++++++++ esp32/src/wifi/crypto_key_entry/addr_low.rs | 28 +++ esp32/src/wifi/ctrl.rs | 28 +++ esp32/src/wifi/ctrl_reg.rs | 28 --- esp32/src/wifi/filter_bank.rs | 87 +++++++++ esp32/src/wifi/filter_bank/addr_high.rs | 48 +++++ esp32/src/wifi/filter_bank/addr_low.rs | 28 +++ esp32/src/wifi/filter_bank/mask_high.rs | 64 +++++++ esp32/src/wifi/filter_bank/mask_low.rs | 28 +++ esp32/src/wifi/ra_filter_addr_high.rs | 48 ----- esp32/src/wifi/ra_filter_addr_low.rs | 28 --- esp32/src/wifi/ra_filter_addr_mask_high.rs | 64 ------- esp32/src/wifi/ra_filter_addr_mask_low.rs | 28 --- esp32/src/wifi/rx_ctrl.rs | 16 ++ esp32/src/wifi/tx_complete_clear.rs | 2 +- esp32/src/wifi/tx_complete_status.rs | 2 +- esp32/src/wifi/unknown_rx_policy.rs | 28 +++ esp32/svd/patches/esp32-wifi.yaml | 138 ++++++++------ 24 files changed, 632 insertions(+), 522 deletions(-) delete mode 100644 esp32/src/wifi/bssid_filter_addr_high.rs delete mode 100644 esp32/src/wifi/bssid_filter_addr_low.rs delete mode 100644 esp32/src/wifi/bssid_filter_addr_mask_high.rs delete mode 100644 esp32/src/wifi/bssid_filter_addr_mask_low.rs create mode 100644 esp32/src/wifi/crypto_key_entry.rs create mode 100644 esp32/src/wifi/crypto_key_entry/addr_high.rs create mode 100644 esp32/src/wifi/crypto_key_entry/addr_low.rs create mode 100644 esp32/src/wifi/ctrl.rs delete mode 100644 esp32/src/wifi/ctrl_reg.rs create mode 100644 esp32/src/wifi/filter_bank.rs create mode 100644 esp32/src/wifi/filter_bank/addr_high.rs create mode 100644 esp32/src/wifi/filter_bank/addr_low.rs create mode 100644 esp32/src/wifi/filter_bank/mask_high.rs create mode 100644 esp32/src/wifi/filter_bank/mask_low.rs delete mode 100644 esp32/src/wifi/ra_filter_addr_high.rs delete mode 100644 esp32/src/wifi/ra_filter_addr_low.rs delete mode 100644 esp32/src/wifi/ra_filter_addr_mask_high.rs delete mode 100644 esp32/src/wifi/ra_filter_addr_mask_low.rs create mode 100644 esp32/src/wifi/unknown_rx_policy.rs diff --git a/esp32/src/wifi.rs b/esp32/src/wifi.rs index f51cf90f3..7381c6c58 100644 --- a/esp32/src/wifi.rs +++ b/esp32/src/wifi.rs @@ -2,76 +2,41 @@ #[cfg_attr(feature = "impl-register-debug", derive(Debug))] #[doc = "Register block"] pub struct RegisterBlock { - bssid_filter_addr_low: BSSID_FILTER_ADDR_LOW, - bssid_filter_addr_high: BSSID_FILTER_ADDR_HIGH, - _reserved2: [u8; 0x18], - bssid_filter_addr_mask_low: BSSID_FILTER_ADDR_MASK_LOW, - bssid_filter_addr_mask_high: BSSID_FILTER_ADDR_MASK_HIGH, - _reserved4: [u8; 0x18], - ra_filter_addr_low: RA_FILTER_ADDR_LOW, - ra_filter_addr_high: RA_FILTER_ADDR_HIGH, - _reserved6: [u8; 0x18], - ra_filter_addr_mask_low: RA_FILTER_ADDR_MASK_LOW, - ra_filter_addr_mask_high: RA_FILTER_ADDR_MASK_HIGH, - _reserved8: [u8; 0x1c], + filter_bank: [FILTER_BANK; 2], + _reserved1: [u8; 0x04], rx_ctrl: RX_CTRL, rx_descr_base: RX_DESCR_BASE, rx_descr_next: RX_DESCR_NEXT, rx_descr_last: RX_DESCR_LAST, - _reserved12: [u8; 0x0bb4], + _reserved5: [u8; 0x44], + unknown_rx_policy: [UNKNOWN_RX_POLICY; 2], + _reserved6: [u8; 0x0b68], wifi_int_status: WIFI_INT_STATUS, wifi_int_clear: WIFI_INT_CLEAR, - _reserved14: [u8; 0x68], - ctrl_reg: CTRL_REG, + _reserved8: [u8; 0x68], + ctrl: CTRL, tx_error_clear: TX_ERROR_CLEAR, tx_error_status: TX_ERROR_STATUS, tx_complete_clear: TX_COMPLETE_CLEAR, tx_complete_status: TX_COMPLETE_STATUS, - _reserved19: [u8; 0x30], + _reserved13: [u8; 0x30], tx_slot_config: [TX_SLOT_CONFIG; 5], - _reserved20: [u8; 0x0444], + _reserved14: [u8; 0x0444], tx_slot_parameters: [TX_SLOT_PARAMETERS; 5], + _reserved15: [u8; 0x016c], + crypto_key_entry: [CRYPTO_KEY_ENTRY; 16], } impl RegisterBlock { - #[doc = "0x00 - First 4 bytes of BSSID MAC address filter"] + #[doc = "0x00..0x80 - Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] #[inline(always)] - pub const fn bssid_filter_addr_low(&self) -> &BSSID_FILTER_ADDR_LOW { - &self.bssid_filter_addr_low + pub const fn filter_bank(&self, n: usize) -> &FILTER_BANK { + &self.filter_bank[n] } - #[doc = "0x04 - last 2 bytes of BSSID MAC address filter"] - #[inline(always)] - pub const fn bssid_filter_addr_high(&self) -> &BSSID_FILTER_ADDR_HIGH { - &self.bssid_filter_addr_high - } - #[doc = "0x20 - mask applied to BSSID MAC address filter"] - #[inline(always)] - pub const fn bssid_filter_addr_mask_low(&self) -> &BSSID_FILTER_ADDR_MASK_LOW { - &self.bssid_filter_addr_mask_low - } - #[doc = "0x24 - mask applied to BSSID MAC address filter"] - #[inline(always)] - pub const fn bssid_filter_addr_mask_high(&self) -> &BSSID_FILTER_ADDR_MASK_HIGH { - &self.bssid_filter_addr_mask_high - } - #[doc = "0x40 - first 4 bytes of RA MAC address filter"] - #[inline(always)] - pub const fn ra_filter_addr_low(&self) -> &RA_FILTER_ADDR_LOW { - &self.ra_filter_addr_low - } - #[doc = "0x44 - last 2 bytes of RA MAC address filter"] - #[inline(always)] - pub const fn ra_filter_addr_high(&self) -> &RA_FILTER_ADDR_HIGH { - &self.ra_filter_addr_high - } - #[doc = "0x60 - mask applied to RA MAC address filter"] - #[inline(always)] - pub const fn ra_filter_addr_mask_low(&self) -> &RA_FILTER_ADDR_MASK_LOW { - &self.ra_filter_addr_mask_low - } - #[doc = "0x64 - mask applied to RA MAC address filter"] + #[doc = "Iterator for array of:"] + #[doc = "0x00..0x80 - Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] #[inline(always)] - pub const fn ra_filter_addr_mask_high(&self) -> &RA_FILTER_ADDR_MASK_HIGH { - &self.ra_filter_addr_mask_high + pub fn filter_bank_iter(&self) -> impl Iterator { + self.filter_bank.iter() } #[doc = "0x84 - Controls the reception of frames"] #[inline(always)] @@ -93,6 +58,17 @@ impl RegisterBlock { pub const fn rx_descr_last(&self) -> &RX_DESCR_LAST { &self.rx_descr_last } + #[doc = "0xd8..0xe0 - "] + #[inline(always)] + pub const fn unknown_rx_policy(&self, n: usize) -> &UNKNOWN_RX_POLICY { + &self.unknown_rx_policy[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0xd8..0xe0 - "] + #[inline(always)] + pub fn unknown_rx_policy_iter(&self) -> impl Iterator { + self.unknown_rx_policy.iter() + } #[doc = "0xc48 - Interrupt status of WIFI peripheral"] #[inline(always)] pub const fn wifi_int_status(&self) -> &WIFI_INT_STATUS { @@ -103,10 +79,10 @@ impl RegisterBlock { pub const fn wifi_int_clear(&self) -> &WIFI_INT_CLEAR { &self.wifi_int_clear } - #[doc = "0xcb8 - Exact name and meaning unknown, used initializing the MAC"] + #[doc = "0xcb8 - Exact name and meaning unknown, used for initializing the MAC"] #[inline(always)] - pub const fn ctrl_reg(&self) -> &CTRL_REG { - &self.ctrl_reg + pub const fn ctrl(&self) -> &CTRL { + &self.ctrl } #[doc = "0xcbc - Clear the error status of a slot"] #[inline(always)] @@ -118,12 +94,12 @@ impl RegisterBlock { pub const fn tx_error_status(&self) -> &TX_ERROR_STATUS { &self.tx_error_status } - #[doc = "0xcc4 - "] + #[doc = "0xcc4 - Clear the completion status of a slot"] #[inline(always)] pub const fn tx_complete_clear(&self) -> &TX_COMPLETE_CLEAR { &self.tx_complete_clear } - #[doc = "0xcc8 - "] + #[doc = "0xcc8 - Completion status of a slot"] #[inline(always)] pub const fn tx_complete_status(&self) -> &TX_COMPLETE_STATUS { &self.tx_complete_status @@ -150,43 +126,18 @@ impl RegisterBlock { pub fn tx_slot_parameters_iter(&self) -> impl Iterator { self.tx_slot_parameters.iter() } + #[doc = "0x1400..0x1680 - The cryptographic keys, to be used by the MAC"] + #[inline(always)] + pub const fn crypto_key_entry(&self, n: usize) -> &CRYPTO_KEY_ENTRY { + &self.crypto_key_entry[n] + } + #[doc = "Iterator for array of:"] + #[doc = "0x1400..0x1680 - The cryptographic keys, to be used by the MAC"] + #[inline(always)] + pub fn crypto_key_entry_iter(&self) -> impl Iterator { + self.crypto_key_entry.iter() + } } -#[doc = "BSSID_FILTER_ADDR_LOW (rw) register accessor: First 4 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bssid_filter_addr_low`] module"] -pub type BSSID_FILTER_ADDR_LOW = crate::Reg; -#[doc = "First 4 bytes of BSSID MAC address filter"] -pub mod bssid_filter_addr_low; -#[doc = "BSSID_FILTER_ADDR_HIGH (rw) register accessor: last 2 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bssid_filter_addr_high`] module"] -pub type BSSID_FILTER_ADDR_HIGH = crate::Reg; -#[doc = "last 2 bytes of BSSID MAC address filter"] -pub mod bssid_filter_addr_high; -#[doc = "BSSID_FILTER_ADDR_MASK_LOW (rw) register accessor: mask applied to BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_mask_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_mask_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bssid_filter_addr_mask_low`] module"] -pub type BSSID_FILTER_ADDR_MASK_LOW = - crate::Reg; -#[doc = "mask applied to BSSID MAC address filter"] -pub mod bssid_filter_addr_mask_low; -#[doc = "BSSID_FILTER_ADDR_MASK_HIGH (rw) register accessor: mask applied to BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_mask_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_mask_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bssid_filter_addr_mask_high`] module"] -pub type BSSID_FILTER_ADDR_MASK_HIGH = - crate::Reg; -#[doc = "mask applied to BSSID MAC address filter"] -pub mod bssid_filter_addr_mask_high; -#[doc = "RA_FILTER_ADDR_LOW (rw) register accessor: first 4 bytes of RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ra_filter_addr_low`] module"] -pub type RA_FILTER_ADDR_LOW = crate::Reg; -#[doc = "first 4 bytes of RA MAC address filter"] -pub mod ra_filter_addr_low; -#[doc = "RA_FILTER_ADDR_HIGH (rw) register accessor: last 2 bytes of RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ra_filter_addr_high`] module"] -pub type RA_FILTER_ADDR_HIGH = crate::Reg; -#[doc = "last 2 bytes of RA MAC address filter"] -pub mod ra_filter_addr_high; -#[doc = "RA_FILTER_ADDR_MASK_LOW (rw) register accessor: mask applied to RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_mask_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_mask_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ra_filter_addr_mask_low`] module"] -pub type RA_FILTER_ADDR_MASK_LOW = - crate::Reg; -#[doc = "mask applied to RA MAC address filter"] -pub mod ra_filter_addr_mask_low; -#[doc = "RA_FILTER_ADDR_MASK_HIGH (rw) register accessor: mask applied to RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_mask_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_mask_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ra_filter_addr_mask_high`] module"] -pub type RA_FILTER_ADDR_MASK_HIGH = - crate::Reg; -#[doc = "mask applied to RA MAC address filter"] -pub mod ra_filter_addr_mask_high; #[doc = "RX_CTRL (rw) register accessor: Controls the reception of frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_ctrl`] module"] pub type RX_CTRL = crate::Reg; #[doc = "Controls the reception of frames"] @@ -203,6 +154,10 @@ pub mod rx_descr_next; pub type RX_DESCR_LAST = crate::Reg; #[doc = "last item in RX DMA list"] pub mod rx_descr_last; +#[doc = "UNKNOWN_RX_POLICY (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`unknown_rx_policy::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`unknown_rx_policy::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@unknown_rx_policy`] module"] +pub type UNKNOWN_RX_POLICY = crate::Reg; +#[doc = ""] +pub mod unknown_rx_policy; #[doc = "WIFI_INT_STATUS (rw) register accessor: Interrupt status of WIFI peripheral\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_int_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_int_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_int_status`] module"] pub type WIFI_INT_STATUS = crate::Reg; #[doc = "Interrupt status of WIFI peripheral"] @@ -211,10 +166,10 @@ pub mod wifi_int_status; pub type WIFI_INT_CLEAR = crate::Reg; #[doc = "Interrupt status clear of WIFI peripheral"] pub mod wifi_int_clear; -#[doc = "CTRL_REG (rw) register accessor: Exact name and meaning unknown, used initializing the MAC\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_reg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_reg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl_reg`] module"] -pub type CTRL_REG = crate::Reg; -#[doc = "Exact name and meaning unknown, used initializing the MAC"] -pub mod ctrl_reg; +#[doc = "CTRL (rw) register accessor: Exact name and meaning unknown, used for initializing the MAC\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"] +pub type CTRL = crate::Reg; +#[doc = "Exact name and meaning unknown, used for initializing the MAC"] +pub mod ctrl; #[doc = "TX_ERROR_CLEAR (rw) register accessor: Clear the error status of a slot\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_error_clear::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_error_clear::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_error_clear`] module"] pub type TX_ERROR_CLEAR = crate::Reg; #[doc = "Clear the error status of a slot"] @@ -223,14 +178,19 @@ pub mod tx_error_clear; pub type TX_ERROR_STATUS = crate::Reg; #[doc = "Error status of a slot"] pub mod tx_error_status; -#[doc = "TX_COMPLETE_CLEAR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_clear::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_clear::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_complete_clear`] module"] +#[doc = "TX_COMPLETE_CLEAR (rw) register accessor: Clear the completion status of a slot\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_clear::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_clear::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_complete_clear`] module"] pub type TX_COMPLETE_CLEAR = crate::Reg; -#[doc = ""] +#[doc = "Clear the completion status of a slot"] pub mod tx_complete_clear; -#[doc = "TX_COMPLETE_STATUS (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_complete_status`] module"] +#[doc = "TX_COMPLETE_STATUS (rw) register accessor: Completion status of a slot\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_complete_status`] module"] pub type TX_COMPLETE_STATUS = crate::Reg; -#[doc = ""] +#[doc = "Completion status of a slot"] pub mod tx_complete_status; +#[doc = "Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] +pub use self::filter_bank::FILTER_BANK; +#[doc = r"Cluster"] +#[doc = "Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] +pub mod filter_bank; #[doc = "Used to configure the TX slot."] pub use self::tx_slot_config::TX_SLOT_CONFIG; #[doc = r"Cluster"] @@ -241,3 +201,8 @@ pub use self::tx_slot_parameters::TX_SLOT_PARAMETERS; #[doc = r"Cluster"] #[doc = "Used to set transmission parameters for the slot"] pub mod tx_slot_parameters; +#[doc = "The cryptographic keys, to be used by the MAC"] +pub use self::crypto_key_entry::CRYPTO_KEY_ENTRY; +#[doc = r"Cluster"] +#[doc = "The cryptographic keys, to be used by the MAC"] +pub mod crypto_key_entry; diff --git a/esp32/src/wifi/bssid_filter_addr_high.rs b/esp32/src/wifi/bssid_filter_addr_high.rs deleted file mode 100644 index 13ccc204e..000000000 --- a/esp32/src/wifi/bssid_filter_addr_high.rs +++ /dev/null @@ -1,48 +0,0 @@ -#[doc = "Register `BSSID_FILTER_ADDR_HIGH` reader"] -pub type R = crate::R; -#[doc = "Register `BSSID_FILTER_ADDR_HIGH` writer"] -pub type W = crate::W; -#[doc = "Field `ADDR` reader - "] -pub type ADDR_R = crate::FieldReader; -#[doc = "Field `ADDR` writer - "] -pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; -impl R { - #[doc = "Bits 0:15"] - #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new((self.bits & 0xffff) as u16) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("BSSID_FILTER_ADDR_HIGH") - .field("addr", &self.addr()) - .finish() - } -} -impl W { - #[doc = "Bits 0:15"] - #[inline(always)] - #[must_use] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W::new(self, 0) - } -} -#[doc = "last 2 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BSSID_FILTER_ADDR_HIGH_SPEC; -impl crate::RegisterSpec for BSSID_FILTER_ADDR_HIGH_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`bssid_filter_addr_high::R`](R) reader structure"] -impl crate::Readable for BSSID_FILTER_ADDR_HIGH_SPEC {} -#[doc = "`write(|w| ..)` method takes [`bssid_filter_addr_high::W`](W) writer structure"] -impl crate::Writable for BSSID_FILTER_ADDR_HIGH_SPEC { - type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; -} -#[doc = "`reset()` method sets BSSID_FILTER_ADDR_HIGH to value 0"] -impl crate::Resettable for BSSID_FILTER_ADDR_HIGH_SPEC { - const RESET_VALUE: u32 = 0; -} diff --git a/esp32/src/wifi/bssid_filter_addr_low.rs b/esp32/src/wifi/bssid_filter_addr_low.rs deleted file mode 100644 index d0860f49d..000000000 --- a/esp32/src/wifi/bssid_filter_addr_low.rs +++ /dev/null @@ -1,28 +0,0 @@ -#[doc = "Register `BSSID_FILTER_ADDR_LOW` reader"] -pub type R = crate::R; -#[doc = "Register `BSSID_FILTER_ADDR_LOW` writer"] -pub type W = crate::W; -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - write!(f, "{}", self.bits()) - } -} -impl W {} -#[doc = "First 4 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BSSID_FILTER_ADDR_LOW_SPEC; -impl crate::RegisterSpec for BSSID_FILTER_ADDR_LOW_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`bssid_filter_addr_low::R`](R) reader structure"] -impl crate::Readable for BSSID_FILTER_ADDR_LOW_SPEC {} -#[doc = "`write(|w| ..)` method takes [`bssid_filter_addr_low::W`](W) writer structure"] -impl crate::Writable for BSSID_FILTER_ADDR_LOW_SPEC { - type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; -} -#[doc = "`reset()` method sets BSSID_FILTER_ADDR_LOW to value 0"] -impl crate::Resettable for BSSID_FILTER_ADDR_LOW_SPEC { - const RESET_VALUE: u32 = 0; -} diff --git a/esp32/src/wifi/bssid_filter_addr_mask_high.rs b/esp32/src/wifi/bssid_filter_addr_mask_high.rs deleted file mode 100644 index 9d7e72267..000000000 --- a/esp32/src/wifi/bssid_filter_addr_mask_high.rs +++ /dev/null @@ -1,64 +0,0 @@ -#[doc = "Register `BSSID_FILTER_ADDR_MASK_HIGH` reader"] -pub type R = crate::R; -#[doc = "Register `BSSID_FILTER_ADDR_MASK_HIGH` writer"] -pub type W = crate::W; -#[doc = "Field `MASK` reader - "] -pub type MASK_R = crate::FieldReader; -#[doc = "Field `MASK` writer - "] -pub type MASK_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; -#[doc = "Field `ENABLE` reader - "] -pub type ENABLE_R = crate::BitReader; -#[doc = "Field `ENABLE` writer - "] -pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:15"] - #[inline(always)] - pub fn mask(&self) -> MASK_R { - MASK_R::new((self.bits & 0xffff) as u16) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new(((self.bits >> 16) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("BSSID_FILTER_ADDR_MASK_HIGH") - .field("mask", &self.mask()) - .field("enable", &self.enable()) - .finish() - } -} -impl W { - #[doc = "Bits 0:15"] - #[inline(always)] - #[must_use] - pub fn mask(&mut self) -> MASK_W { - MASK_W::new(self, 0) - } - #[doc = "Bit 16"] - #[inline(always)] - #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self, 16) - } -} -#[doc = "mask applied to BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_mask_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_mask_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BSSID_FILTER_ADDR_MASK_HIGH_SPEC; -impl crate::RegisterSpec for BSSID_FILTER_ADDR_MASK_HIGH_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`bssid_filter_addr_mask_high::R`](R) reader structure"] -impl crate::Readable for BSSID_FILTER_ADDR_MASK_HIGH_SPEC {} -#[doc = "`write(|w| ..)` method takes [`bssid_filter_addr_mask_high::W`](W) writer structure"] -impl crate::Writable for BSSID_FILTER_ADDR_MASK_HIGH_SPEC { - type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; -} -#[doc = "`reset()` method sets BSSID_FILTER_ADDR_MASK_HIGH to value 0"] -impl crate::Resettable for BSSID_FILTER_ADDR_MASK_HIGH_SPEC { - const RESET_VALUE: u32 = 0; -} diff --git a/esp32/src/wifi/bssid_filter_addr_mask_low.rs b/esp32/src/wifi/bssid_filter_addr_mask_low.rs deleted file mode 100644 index 7ee224bc0..000000000 --- a/esp32/src/wifi/bssid_filter_addr_mask_low.rs +++ /dev/null @@ -1,28 +0,0 @@ -#[doc = "Register `BSSID_FILTER_ADDR_MASK_LOW` reader"] -pub type R = crate::R; -#[doc = "Register `BSSID_FILTER_ADDR_MASK_LOW` writer"] -pub type W = crate::W; -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - write!(f, "{}", self.bits()) - } -} -impl W {} -#[doc = "mask applied to BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`bssid_filter_addr_mask_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bssid_filter_addr_mask_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BSSID_FILTER_ADDR_MASK_LOW_SPEC; -impl crate::RegisterSpec for BSSID_FILTER_ADDR_MASK_LOW_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`bssid_filter_addr_mask_low::R`](R) reader structure"] -impl crate::Readable for BSSID_FILTER_ADDR_MASK_LOW_SPEC {} -#[doc = "`write(|w| ..)` method takes [`bssid_filter_addr_mask_low::W`](W) writer structure"] -impl crate::Writable for BSSID_FILTER_ADDR_MASK_LOW_SPEC { - type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; -} -#[doc = "`reset()` method sets BSSID_FILTER_ADDR_MASK_LOW to value 0"] -impl crate::Resettable for BSSID_FILTER_ADDR_MASK_LOW_SPEC { - const RESET_VALUE: u32 = 0; -} diff --git a/esp32/src/wifi/crypto_key_entry.rs b/esp32/src/wifi/crypto_key_entry.rs new file mode 100644 index 000000000..0c503284b --- /dev/null +++ b/esp32/src/wifi/crypto_key_entry.rs @@ -0,0 +1,28 @@ +#[repr(C)] +#[cfg_attr(feature = "impl-register-debug", derive(Debug))] +#[doc = "The cryptographic keys, to be used by the MAC"] +pub struct CRYPTO_KEY_ENTRY { + addr_low: ADDR_LOW, + addr_high: ADDR_HIGH, + _reserved_end: [u8; 0x20], +} +impl CRYPTO_KEY_ENTRY { + #[doc = "0x00 - "] + #[inline(always)] + pub const fn addr_low(&self) -> &ADDR_LOW { + &self.addr_low + } + #[doc = "0x04 - "] + #[inline(always)] + pub const fn addr_high(&self) -> &ADDR_HIGH { + &self.addr_high + } +} +#[doc = "ADDR_LOW (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`addr_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr_low`] module"] +pub type ADDR_LOW = crate::Reg; +#[doc = ""] +pub mod addr_low; +#[doc = "ADDR_HIGH (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`addr_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr_high`] module"] +pub type ADDR_HIGH = crate::Reg; +#[doc = ""] +pub mod addr_high; diff --git a/esp32/src/wifi/crypto_key_entry/addr_high.rs b/esp32/src/wifi/crypto_key_entry/addr_high.rs new file mode 100644 index 000000000..be45e281d --- /dev/null +++ b/esp32/src/wifi/crypto_key_entry/addr_high.rs @@ -0,0 +1,96 @@ +#[doc = "Register `ADDR_HIGH` reader"] +pub type R = crate::R; +#[doc = "Register `ADDR_HIGH` writer"] +pub type W = crate::W; +#[doc = "Field `ADDR` reader - "] +pub type ADDR_R = crate::FieldReader; +#[doc = "Field `ADDR` writer - "] +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `ALGORITHM` reader - "] +pub type ALGORITHM_R = crate::FieldReader; +#[doc = "Field `ALGORITHM` writer - "] +pub type ALGORITHM_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `INTERFACE` reader - "] +pub type INTERFACE_R = crate::FieldReader; +#[doc = "Field `INTERFACE` writer - "] +pub type INTERFACE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `SUPPLICANT_KEY_INDEX` reader - "] +pub type SUPPLICANT_KEY_INDEX_R = crate::FieldReader; +#[doc = "Field `SUPPLICANT_KEY_INDEX` writer - "] +pub type SUPPLICANT_KEY_INDEX_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +impl R { + #[doc = "Bits 0:15"] + #[inline(always)] + pub fn addr(&self) -> ADDR_R { + ADDR_R::new((self.bits & 0xffff) as u16) + } + #[doc = "Bits 18:20"] + #[inline(always)] + pub fn algorithm(&self) -> ALGORITHM_R { + ALGORITHM_R::new(((self.bits >> 18) & 7) as u8) + } + #[doc = "Bits 24:25"] + #[inline(always)] + pub fn interface(&self) -> INTERFACE_R { + INTERFACE_R::new(((self.bits >> 24) & 3) as u8) + } + #[doc = "Bits 30:31"] + #[inline(always)] + pub fn supplicant_key_index(&self) -> SUPPLICANT_KEY_INDEX_R { + SUPPLICANT_KEY_INDEX_R::new(((self.bits >> 30) & 3) as u8) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("ADDR_HIGH") + .field("addr", &self.addr()) + .field("algorithm", &self.algorithm()) + .field("interface", &self.interface()) + .field("supplicant_key_index", &self.supplicant_key_index()) + .finish() + } +} +impl W { + #[doc = "Bits 0:15"] + #[inline(always)] + #[must_use] + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 0) + } + #[doc = "Bits 18:20"] + #[inline(always)] + #[must_use] + pub fn algorithm(&mut self) -> ALGORITHM_W { + ALGORITHM_W::new(self, 18) + } + #[doc = "Bits 24:25"] + #[inline(always)] + #[must_use] + pub fn interface(&mut self) -> INTERFACE_W { + INTERFACE_W::new(self, 24) + } + #[doc = "Bits 30:31"] + #[inline(always)] + #[must_use] + pub fn supplicant_key_index(&mut self) -> SUPPLICANT_KEY_INDEX_W { + SUPPLICANT_KEY_INDEX_W::new(self, 30) + } +} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`addr_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ADDR_HIGH_SPEC; +impl crate::RegisterSpec for ADDR_HIGH_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`addr_high::R`](R) reader structure"] +impl crate::Readable for ADDR_HIGH_SPEC {} +#[doc = "`write(|w| ..)` method takes [`addr_high::W`](W) writer structure"] +impl crate::Writable for ADDR_HIGH_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets ADDR_HIGH to value 0"] +impl crate::Resettable for ADDR_HIGH_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/crypto_key_entry/addr_low.rs b/esp32/src/wifi/crypto_key_entry/addr_low.rs new file mode 100644 index 000000000..5c2d5c2c0 --- /dev/null +++ b/esp32/src/wifi/crypto_key_entry/addr_low.rs @@ -0,0 +1,28 @@ +#[doc = "Register `ADDR_LOW` reader"] +pub type R = crate::R; +#[doc = "Register `ADDR_LOW` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`addr_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ADDR_LOW_SPEC; +impl crate::RegisterSpec for ADDR_LOW_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`addr_low::R`](R) reader structure"] +impl crate::Readable for ADDR_LOW_SPEC {} +#[doc = "`write(|w| ..)` method takes [`addr_low::W`](W) writer structure"] +impl crate::Writable for ADDR_LOW_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets ADDR_LOW to value 0"] +impl crate::Resettable for ADDR_LOW_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/ctrl.rs b/esp32/src/wifi/ctrl.rs new file mode 100644 index 000000000..0f45f772e --- /dev/null +++ b/esp32/src/wifi/ctrl.rs @@ -0,0 +1,28 @@ +#[doc = "Register `CTRL` reader"] +pub type R = crate::R; +#[doc = "Register `CTRL` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "Exact name and meaning unknown, used for initializing the MAC\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CTRL_SPEC; +impl crate::RegisterSpec for CTRL_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"] +impl crate::Readable for CTRL_SPEC {} +#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"] +impl crate::Writable for CTRL_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets CTRL to value 0"] +impl crate::Resettable for CTRL_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/ctrl_reg.rs b/esp32/src/wifi/ctrl_reg.rs deleted file mode 100644 index 165f753d5..000000000 --- a/esp32/src/wifi/ctrl_reg.rs +++ /dev/null @@ -1,28 +0,0 @@ -#[doc = "Register `CTRL_REG` reader"] -pub type R = crate::R; -#[doc = "Register `CTRL_REG` writer"] -pub type W = crate::W; -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - write!(f, "{}", self.bits()) - } -} -impl W {} -#[doc = "Exact name and meaning unknown, used initializing the MAC\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_reg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_reg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CTRL_REG_SPEC; -impl crate::RegisterSpec for CTRL_REG_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`ctrl_reg::R`](R) reader structure"] -impl crate::Readable for CTRL_REG_SPEC {} -#[doc = "`write(|w| ..)` method takes [`ctrl_reg::W`](W) writer structure"] -impl crate::Writable for CTRL_REG_SPEC { - type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; -} -#[doc = "`reset()` method sets CTRL_REG to value 0"] -impl crate::Resettable for CTRL_REG_SPEC { - const RESET_VALUE: u32 = 0; -} diff --git a/esp32/src/wifi/filter_bank.rs b/esp32/src/wifi/filter_bank.rs new file mode 100644 index 000000000..cac866ef2 --- /dev/null +++ b/esp32/src/wifi/filter_bank.rs @@ -0,0 +1,87 @@ +#[repr(C)] +#[cfg_attr(feature = "impl-register-debug", derive(Debug))] +#[doc = "Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] +pub struct FILTER_BANK { + addr_low: (), + _reserved1: [u8; 0x04], + addr_high: (), + _reserved2: [u8; 0x1c], + mask_low: (), + _reserved3: [u8; 0x04], + mask_high: (), + _reserved_end: [u8; 0x1c], +} +impl FILTER_BANK { + #[doc = "0x00..0x08 - First 4 bytes of BSSID MAC address filter"] + #[inline(always)] + pub const fn addr_low(&self, n: usize) -> &ADDR_LOW { + #[allow(clippy::no_effect)] + [(); 2][n]; + unsafe { &*(self as *const Self).cast::().add(0).add(8 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x00..0x08 - First 4 bytes of BSSID MAC address filter"] + #[inline(always)] + pub fn addr_low_iter(&self) -> impl Iterator { + (0..2) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(0).add(8 * n).cast() }) + } + #[doc = "0x04..0x0c - last 2 bytes of BSSID MAC address filter"] + #[inline(always)] + pub const fn addr_high(&self, n: usize) -> &ADDR_HIGH { + #[allow(clippy::no_effect)] + [(); 2][n]; + unsafe { &*(self as *const Self).cast::().add(4).add(8 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x04..0x0c - last 2 bytes of BSSID MAC address filter"] + #[inline(always)] + pub fn addr_high_iter(&self) -> impl Iterator { + (0..2) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(4).add(8 * n).cast() }) + } + #[doc = "0x20..0x28 - First 4 bytes of BSSID MAC address filter mask"] + #[inline(always)] + pub const fn mask_low(&self, n: usize) -> &MASK_LOW { + #[allow(clippy::no_effect)] + [(); 2][n]; + unsafe { &*(self as *const Self).cast::().add(32).add(8 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x20..0x28 - First 4 bytes of BSSID MAC address filter mask"] + #[inline(always)] + pub fn mask_low_iter(&self) -> impl Iterator { + (0..2) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(32).add(8 * n).cast() }) + } + #[doc = "0x24..0x2c - last 2 bytes of BSSID MAC address filter mask"] + #[inline(always)] + pub const fn mask_high(&self, n: usize) -> &MASK_HIGH { + #[allow(clippy::no_effect)] + [(); 2][n]; + unsafe { &*(self as *const Self).cast::().add(36).add(8 * n).cast() } + } + #[doc = "Iterator for array of:"] + #[doc = "0x24..0x2c - last 2 bytes of BSSID MAC address filter mask"] + #[inline(always)] + pub fn mask_high_iter(&self) -> impl Iterator { + (0..2) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(36).add(8 * n).cast() }) + } +} +#[doc = "ADDR_LOW (rw) register accessor: First 4 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`addr_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr_low`] module"] +pub type ADDR_LOW = crate::Reg; +#[doc = "First 4 bytes of BSSID MAC address filter"] +pub mod addr_low; +#[doc = "ADDR_HIGH (rw) register accessor: last 2 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`addr_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr_high`] module"] +pub type ADDR_HIGH = crate::Reg; +#[doc = "last 2 bytes of BSSID MAC address filter"] +pub mod addr_high; +#[doc = "MASK_LOW (rw) register accessor: First 4 bytes of BSSID MAC address filter mask\n\nYou can [`read`](crate::Reg::read) this register and get [`mask_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mask_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mask_low`] module"] +pub type MASK_LOW = crate::Reg; +#[doc = "First 4 bytes of BSSID MAC address filter mask"] +pub mod mask_low; +#[doc = "MASK_HIGH (rw) register accessor: last 2 bytes of BSSID MAC address filter mask\n\nYou can [`read`](crate::Reg::read) this register and get [`mask_high::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mask_high::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mask_high`] module"] +pub type MASK_HIGH = crate::Reg; +#[doc = "last 2 bytes of BSSID MAC address filter mask"] +pub mod mask_high; diff --git a/esp32/src/wifi/filter_bank/addr_high.rs b/esp32/src/wifi/filter_bank/addr_high.rs new file mode 100644 index 000000000..10d6bdc9f --- /dev/null +++ b/esp32/src/wifi/filter_bank/addr_high.rs @@ -0,0 +1,48 @@ +#[doc = "Register `ADDR_HIGH%s` reader"] +pub type R = crate::R; +#[doc = "Register `ADDR_HIGH%s` writer"] +pub type W = crate::W; +#[doc = "Field `ADDR` reader - "] +pub type ADDR_R = crate::FieldReader; +#[doc = "Field `ADDR` writer - "] +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +impl R { + #[doc = "Bits 0:15"] + #[inline(always)] + pub fn addr(&self) -> ADDR_R { + ADDR_R::new((self.bits & 0xffff) as u16) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("ADDR_HIGH") + .field("addr", &self.addr()) + .finish() + } +} +impl W { + #[doc = "Bits 0:15"] + #[inline(always)] + #[must_use] + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 0) + } +} +#[doc = "last 2 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`addr_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ADDR_HIGH_SPEC; +impl crate::RegisterSpec for ADDR_HIGH_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`addr_high::R`](R) reader structure"] +impl crate::Readable for ADDR_HIGH_SPEC {} +#[doc = "`write(|w| ..)` method takes [`addr_high::W`](W) writer structure"] +impl crate::Writable for ADDR_HIGH_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets ADDR_HIGH%s to value 0"] +impl crate::Resettable for ADDR_HIGH_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/filter_bank/addr_low.rs b/esp32/src/wifi/filter_bank/addr_low.rs new file mode 100644 index 000000000..bfd170679 --- /dev/null +++ b/esp32/src/wifi/filter_bank/addr_low.rs @@ -0,0 +1,28 @@ +#[doc = "Register `ADDR_LOW%s` reader"] +pub type R = crate::R; +#[doc = "Register `ADDR_LOW%s` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "First 4 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`addr_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct ADDR_LOW_SPEC; +impl crate::RegisterSpec for ADDR_LOW_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`addr_low::R`](R) reader structure"] +impl crate::Readable for ADDR_LOW_SPEC {} +#[doc = "`write(|w| ..)` method takes [`addr_low::W`](W) writer structure"] +impl crate::Writable for ADDR_LOW_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets ADDR_LOW%s to value 0"] +impl crate::Resettable for ADDR_LOW_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/filter_bank/mask_high.rs b/esp32/src/wifi/filter_bank/mask_high.rs new file mode 100644 index 000000000..31ad42247 --- /dev/null +++ b/esp32/src/wifi/filter_bank/mask_high.rs @@ -0,0 +1,64 @@ +#[doc = "Register `MASK_HIGH%s` reader"] +pub type R = crate::R; +#[doc = "Register `MASK_HIGH%s` writer"] +pub type W = crate::W; +#[doc = "Field `MASK` reader - "] +pub type MASK_R = crate::FieldReader; +#[doc = "Field `MASK` writer - "] +pub type MASK_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `ENABLED` reader - "] +pub type ENABLED_R = crate::BitReader; +#[doc = "Field `ENABLED` writer - "] +pub type ENABLED_W<'a, REG> = crate::BitWriter<'a, REG>; +impl R { + #[doc = "Bits 0:15"] + #[inline(always)] + pub fn mask(&self) -> MASK_R { + MASK_R::new((self.bits & 0xffff) as u16) + } + #[doc = "Bit 16"] + #[inline(always)] + pub fn enabled(&self) -> ENABLED_R { + ENABLED_R::new(((self.bits >> 16) & 1) != 0) + } +} +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct("MASK_HIGH") + .field("mask", &self.mask()) + .field("enabled", &self.enabled()) + .finish() + } +} +impl W { + #[doc = "Bits 0:15"] + #[inline(always)] + #[must_use] + pub fn mask(&mut self) -> MASK_W { + MASK_W::new(self, 0) + } + #[doc = "Bit 16"] + #[inline(always)] + #[must_use] + pub fn enabled(&mut self) -> ENABLED_W { + ENABLED_W::new(self, 16) + } +} +#[doc = "last 2 bytes of BSSID MAC address filter mask\n\nYou can [`read`](crate::Reg::read) this register and get [`mask_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mask_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MASK_HIGH_SPEC; +impl crate::RegisterSpec for MASK_HIGH_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`mask_high::R`](R) reader structure"] +impl crate::Readable for MASK_HIGH_SPEC {} +#[doc = "`write(|w| ..)` method takes [`mask_high::W`](W) writer structure"] +impl crate::Writable for MASK_HIGH_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets MASK_HIGH%s to value 0"] +impl crate::Resettable for MASK_HIGH_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/filter_bank/mask_low.rs b/esp32/src/wifi/filter_bank/mask_low.rs new file mode 100644 index 000000000..db9554f12 --- /dev/null +++ b/esp32/src/wifi/filter_bank/mask_low.rs @@ -0,0 +1,28 @@ +#[doc = "Register `MASK_LOW%s` reader"] +pub type R = crate::R; +#[doc = "Register `MASK_LOW%s` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "First 4 bytes of BSSID MAC address filter mask\n\nYou can [`read`](crate::Reg::read) this register and get [`mask_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mask_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct MASK_LOW_SPEC; +impl crate::RegisterSpec for MASK_LOW_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`mask_low::R`](R) reader structure"] +impl crate::Readable for MASK_LOW_SPEC {} +#[doc = "`write(|w| ..)` method takes [`mask_low::W`](W) writer structure"] +impl crate::Writable for MASK_LOW_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets MASK_LOW%s to value 0"] +impl crate::Resettable for MASK_LOW_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/ra_filter_addr_high.rs b/esp32/src/wifi/ra_filter_addr_high.rs deleted file mode 100644 index 77ca898b1..000000000 --- a/esp32/src/wifi/ra_filter_addr_high.rs +++ /dev/null @@ -1,48 +0,0 @@ -#[doc = "Register `RA_FILTER_ADDR_HIGH` reader"] -pub type R = crate::R; -#[doc = "Register `RA_FILTER_ADDR_HIGH` writer"] -pub type W = crate::W; -#[doc = "Field `ADDR` reader - "] -pub type ADDR_R = crate::FieldReader; -#[doc = "Field `ADDR` writer - "] -pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; -impl R { - #[doc = "Bits 0:15"] - #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new((self.bits & 0xffff) as u16) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("RA_FILTER_ADDR_HIGH") - .field("addr", &self.addr()) - .finish() - } -} -impl W { - #[doc = "Bits 0:15"] - #[inline(always)] - #[must_use] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W::new(self, 0) - } -} -#[doc = "last 2 bytes of RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RA_FILTER_ADDR_HIGH_SPEC; -impl crate::RegisterSpec for RA_FILTER_ADDR_HIGH_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`ra_filter_addr_high::R`](R) reader structure"] -impl crate::Readable for RA_FILTER_ADDR_HIGH_SPEC {} -#[doc = "`write(|w| ..)` method takes [`ra_filter_addr_high::W`](W) writer structure"] -impl crate::Writable for RA_FILTER_ADDR_HIGH_SPEC { - type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; -} -#[doc = "`reset()` method sets RA_FILTER_ADDR_HIGH to value 0"] -impl crate::Resettable for RA_FILTER_ADDR_HIGH_SPEC { - const RESET_VALUE: u32 = 0; -} diff --git a/esp32/src/wifi/ra_filter_addr_low.rs b/esp32/src/wifi/ra_filter_addr_low.rs deleted file mode 100644 index 589c67876..000000000 --- a/esp32/src/wifi/ra_filter_addr_low.rs +++ /dev/null @@ -1,28 +0,0 @@ -#[doc = "Register `RA_FILTER_ADDR_LOW` reader"] -pub type R = crate::R; -#[doc = "Register `RA_FILTER_ADDR_LOW` writer"] -pub type W = crate::W; -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - write!(f, "{}", self.bits()) - } -} -impl W {} -#[doc = "first 4 bytes of RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RA_FILTER_ADDR_LOW_SPEC; -impl crate::RegisterSpec for RA_FILTER_ADDR_LOW_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`ra_filter_addr_low::R`](R) reader structure"] -impl crate::Readable for RA_FILTER_ADDR_LOW_SPEC {} -#[doc = "`write(|w| ..)` method takes [`ra_filter_addr_low::W`](W) writer structure"] -impl crate::Writable for RA_FILTER_ADDR_LOW_SPEC { - type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; -} -#[doc = "`reset()` method sets RA_FILTER_ADDR_LOW to value 0"] -impl crate::Resettable for RA_FILTER_ADDR_LOW_SPEC { - const RESET_VALUE: u32 = 0; -} diff --git a/esp32/src/wifi/ra_filter_addr_mask_high.rs b/esp32/src/wifi/ra_filter_addr_mask_high.rs deleted file mode 100644 index 4a16a5376..000000000 --- a/esp32/src/wifi/ra_filter_addr_mask_high.rs +++ /dev/null @@ -1,64 +0,0 @@ -#[doc = "Register `RA_FILTER_ADDR_MASK_HIGH` reader"] -pub type R = crate::R; -#[doc = "Register `RA_FILTER_ADDR_MASK_HIGH` writer"] -pub type W = crate::W; -#[doc = "Field `MASK` reader - "] -pub type MASK_R = crate::FieldReader; -#[doc = "Field `MASK` writer - "] -pub type MASK_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; -#[doc = "Field `ENABLE` reader - "] -pub type ENABLE_R = crate::BitReader; -#[doc = "Field `ENABLE` writer - "] -pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; -impl R { - #[doc = "Bits 0:15"] - #[inline(always)] - pub fn mask(&self) -> MASK_R { - MASK_R::new((self.bits & 0xffff) as u16) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new(((self.bits >> 16) & 1) != 0) - } -} -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("RA_FILTER_ADDR_MASK_HIGH") - .field("mask", &self.mask()) - .field("enable", &self.enable()) - .finish() - } -} -impl W { - #[doc = "Bits 0:15"] - #[inline(always)] - #[must_use] - pub fn mask(&mut self) -> MASK_W { - MASK_W::new(self, 0) - } - #[doc = "Bit 16"] - #[inline(always)] - #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self, 16) - } -} -#[doc = "mask applied to RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_mask_high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_mask_high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RA_FILTER_ADDR_MASK_HIGH_SPEC; -impl crate::RegisterSpec for RA_FILTER_ADDR_MASK_HIGH_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`ra_filter_addr_mask_high::R`](R) reader structure"] -impl crate::Readable for RA_FILTER_ADDR_MASK_HIGH_SPEC {} -#[doc = "`write(|w| ..)` method takes [`ra_filter_addr_mask_high::W`](W) writer structure"] -impl crate::Writable for RA_FILTER_ADDR_MASK_HIGH_SPEC { - type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; -} -#[doc = "`reset()` method sets RA_FILTER_ADDR_MASK_HIGH to value 0"] -impl crate::Resettable for RA_FILTER_ADDR_MASK_HIGH_SPEC { - const RESET_VALUE: u32 = 0; -} diff --git a/esp32/src/wifi/ra_filter_addr_mask_low.rs b/esp32/src/wifi/ra_filter_addr_mask_low.rs deleted file mode 100644 index cbddf8fee..000000000 --- a/esp32/src/wifi/ra_filter_addr_mask_low.rs +++ /dev/null @@ -1,28 +0,0 @@ -#[doc = "Register `RA_FILTER_ADDR_MASK_LOW` reader"] -pub type R = crate::R; -#[doc = "Register `RA_FILTER_ADDR_MASK_LOW` writer"] -pub type W = crate::W; -#[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for R { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - write!(f, "{}", self.bits()) - } -} -impl W {} -#[doc = "mask applied to RA MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`ra_filter_addr_mask_low::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ra_filter_addr_mask_low::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RA_FILTER_ADDR_MASK_LOW_SPEC; -impl crate::RegisterSpec for RA_FILTER_ADDR_MASK_LOW_SPEC { - type Ux = u32; -} -#[doc = "`read()` method returns [`ra_filter_addr_mask_low::R`](R) reader structure"] -impl crate::Readable for RA_FILTER_ADDR_MASK_LOW_SPEC {} -#[doc = "`write(|w| ..)` method takes [`ra_filter_addr_mask_low::W`](W) writer structure"] -impl crate::Writable for RA_FILTER_ADDR_MASK_LOW_SPEC { - type Safety = crate::Unsafe; - const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; - const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; -} -#[doc = "`reset()` method sets RA_FILTER_ADDR_MASK_LOW to value 0"] -impl crate::Resettable for RA_FILTER_ADDR_MASK_LOW_SPEC { - const RESET_VALUE: u32 = 0; -} diff --git a/esp32/src/wifi/rx_ctrl.rs b/esp32/src/wifi/rx_ctrl.rs index 4e80981c5..622ae66ba 100644 --- a/esp32/src/wifi/rx_ctrl.rs +++ b/esp32/src/wifi/rx_ctrl.rs @@ -6,18 +6,28 @@ pub type W = crate::W; pub type RX_DESCR_RELOAD_R = crate::BitReader; #[doc = "Field `RX_DESCR_RELOAD` writer - Instruct the hardware to reload the RX descriptors"] pub type RX_DESCR_RELOAD_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `RX_ENABLE` reader - Enable frame reception"] +pub type RX_ENABLE_R = crate::BitReader; +#[doc = "Field `RX_ENABLE` writer - Enable frame reception"] +pub type RX_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Instruct the hardware to reload the RX descriptors"] #[inline(always)] pub fn rx_descr_reload(&self) -> RX_DESCR_RELOAD_R { RX_DESCR_RELOAD_R::new((self.bits & 1) != 0) } + #[doc = "Bit 31 - Enable frame reception"] + #[inline(always)] + pub fn rx_enable(&self) -> RX_ENABLE_R { + RX_ENABLE_R::new(((self.bits >> 31) & 1) != 0) + } } #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("RX_CTRL") .field("rx_descr_reload", &self.rx_descr_reload()) + .field("rx_enable", &self.rx_enable()) .finish() } } @@ -28,6 +38,12 @@ impl W { pub fn rx_descr_reload(&mut self) -> RX_DESCR_RELOAD_W { RX_DESCR_RELOAD_W::new(self, 0) } + #[doc = "Bit 31 - Enable frame reception"] + #[inline(always)] + #[must_use] + pub fn rx_enable(&mut self) -> RX_ENABLE_W { + RX_ENABLE_W::new(self, 31) + } } #[doc = "Controls the reception of frames\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rx_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RX_CTRL_SPEC; diff --git a/esp32/src/wifi/tx_complete_clear.rs b/esp32/src/wifi/tx_complete_clear.rs index 5910ecfc2..4850d6828 100644 --- a/esp32/src/wifi/tx_complete_clear.rs +++ b/esp32/src/wifi/tx_complete_clear.rs @@ -29,7 +29,7 @@ impl W { SLOTS_W::new(self, 0) } } -#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_clear::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_clear::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Clear the completion status of a slot\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_clear::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_clear::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_COMPLETE_CLEAR_SPEC; impl crate::RegisterSpec for TX_COMPLETE_CLEAR_SPEC { type Ux = u32; diff --git a/esp32/src/wifi/tx_complete_status.rs b/esp32/src/wifi/tx_complete_status.rs index b152ea941..e7057471d 100644 --- a/esp32/src/wifi/tx_complete_status.rs +++ b/esp32/src/wifi/tx_complete_status.rs @@ -29,7 +29,7 @@ impl W { SLOTS_W::new(self, 0) } } -#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +#[doc = "Completion status of a slot\n\nYou can [`read`](crate::Reg::read) this register and get [`tx_complete_status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tx_complete_status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct TX_COMPLETE_STATUS_SPEC; impl crate::RegisterSpec for TX_COMPLETE_STATUS_SPEC { type Ux = u32; diff --git a/esp32/src/wifi/unknown_rx_policy.rs b/esp32/src/wifi/unknown_rx_policy.rs new file mode 100644 index 000000000..855d52111 --- /dev/null +++ b/esp32/src/wifi/unknown_rx_policy.rs @@ -0,0 +1,28 @@ +#[doc = "Register `UNKNOWN_RX_POLICY%s` reader"] +pub type R = crate::R; +#[doc = "Register `UNKNOWN_RX_POLICY%s` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`unknown_rx_policy::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`unknown_rx_policy::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct UNKNOWN_RX_POLICY_SPEC; +impl crate::RegisterSpec for UNKNOWN_RX_POLICY_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`unknown_rx_policy::R`](R) reader structure"] +impl crate::Readable for UNKNOWN_RX_POLICY_SPEC {} +#[doc = "`write(|w| ..)` method takes [`unknown_rx_policy::W`](W) writer structure"] +impl crate::Writable for UNKNOWN_RX_POLICY_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets UNKNOWN_RX_POLICY%s to value 0"] +impl crate::Resettable for UNKNOWN_RX_POLICY_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/svd/patches/esp32-wifi.yaml b/esp32/svd/patches/esp32-wifi.yaml index 4f93e5fc1..cebc09e46 100644 --- a/esp32/svd/patches/esp32-wifi.yaml +++ b/esp32/svd/patches/esp32-wifi.yaml @@ -15,58 +15,6 @@ _add: size: 0x2000 usage: registers registers: - BSSID_FILTER_ADDR_LOW: - description: First 4 bytes of BSSID MAC address filter - addressOffset: 0x0 - access: read-write - BSSID_FILTER_ADDR_HIGH: - description: last 2 bytes of BSSID MAC address filter - addressOffset: 0x4 - fields: - ADDR: - bitOffset: 0 - bitWidth: 16 - BSSID_FILTER_ADDR_MASK_LOW: - description: mask applied to BSSID MAC address filter - addressOffset: 0x20 - access: read-write - BSSID_FILTER_ADDR_MASK_HIGH: - description: mask applied to BSSID MAC address filter - addressOffset: 0x24 - access: read-write - fields: - MASK: - bitOffset: 0 - bitWidth: 16 - ENABLE: - bitOffset: 16 - bitWidth: 1 - RA_FILTER_ADDR_LOW: - description: first 4 bytes of RA MAC address filter - addressOffset: 0x40 - access: read-write - RA_FILTER_ADDR_HIGH: - description: last 2 bytes of RA MAC address filter - addressOffset: 0x44 - fields: - ADDR: - bitOffset: 0 - bitWidth: 16 - RA_FILTER_ADDR_MASK_LOW: - description: mask applied to RA MAC address filter - addressOffset: 0x60 - access: read-write - RA_FILTER_ADDR_MASK_HIGH: - description: mask applied to RA MAC address filter - addressOffset: 0x64 - access: read-write - fields: - MASK: - bitOffset: 0 - bitWidth: 16 - ENABLE: - bitOffset: 16 - bitWidth: 1 RX_CTRL: description: Controls the reception of frames addressOffset: 0x84 @@ -76,6 +24,10 @@ _add: bitOffset: 0 bitWidth: 1 description: Instruct the hardware to reload the RX descriptors + RX_ENABLE: + bitOffset: 31 + bitWidth: 1 + description: Enable frame reception RX_DESCR_BASE: description: base address of the RX DMA list addressOffset: 0x88 @@ -88,6 +40,11 @@ _add: description: last item in RX DMA list addressOffset: 0x90 access: read-write + UNKNOWN_RX_POLICY%s: + dim: 2 + dimIncrement: 4 + addressOffset: 0xd8 + access: read-write WIFI_INT_STATUS: description: Interrupt status of WIFI peripheral addressOffset: 0xc48 @@ -109,8 +66,8 @@ _add: description: Interrupt status clear of WIFI peripheral addressOffset: 0xc4c access: write - CTRL_REG: - description: Exact name and meaning unknown, used initializing the MAC + CTRL: + description: Exact name and meaning unknown, used for initializing the MAC addressOffset: 0xcb8 access: read-write TX_ERROR_CLEAR: @@ -154,6 +111,53 @@ _add: WIFI: _add: _clusters: + FILTER_BANK%s: + dim: 2 + dimIncrement: 0x40 + addressOffset: 0x0 + description: " + Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. + Each filter bank has registers for two interfaces. + " + registers: + ADDR_LOW%s: + dim: 2 + dimIncrement: 0x8 + description: First 4 bytes of BSSID MAC address filter + addressOffset: 0x0 + access: read-write + ADDR_HIGH%s: + dim: 2 + dimIncrement: 0x8 + description: last 2 bytes of BSSID MAC address filter + addressOffset: 0x4 + access: read-write + fields: + ADDR: + bitOffset: 0 + bitWidth: 16 + access: read-write + MASK_LOW%s: + dim: 2 + dimIncrement: 0x8 + description: First 4 bytes of BSSID MAC address filter mask + addressOffset: 0x20 + access: read-write + MASK_HIGH%s: + dim: 2 + dimIncrement: 0x8 + description: last 2 bytes of BSSID MAC address filter mask + addressOffset: 0x24 + access: read-write + fields: + MASK: + bitOffset: 0 + bitWidth: 16 + access: read-write + ENABLED: + bitOffset: 16 + bitWidth: 1 + access: read-write TX_SLOT_CONFIG%s: dim: 5 dimIncrement: 0x8 @@ -234,3 +238,29 @@ WIFI: description: duration of the frame exchange addressOffset: 0x10 access: read-write + CRYPTO_KEY_ENTRY%s: + dim: 16 + dimIncrement: 40 + addressOffset: 0x1400 + access: read-write + description: The cryptographic keys, to be used by the MAC + registers: + ADDR_LOW: + addressOffset: 0x0 + access: read-write + ADDR_HIGH: + addressOffset: 0x4 + access: read-write + fields: + ADDR: + bitOffset: 0x0 + bitWidth: 0x10 + ALGORITHM: + bitOffset: 0x12 + bitWidth: 0x3 + INTERFACE: + bitOffset: 0x18 + bitWidth: 0x2 + SUPPLICANT_KEY_INDEX: + bitOffset: 0x1e + bitWidth: 0x2 From 05455ccf51c756de335012456b3ca500c711d6f8 Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Tue, 22 Oct 2024 20:20:08 +0200 Subject: [PATCH 3/8] Added some statistic registers. --- esp32/src/wifi.rs | 123 +++++++++++++++++++++++++-- esp32/src/wifi/hw_stat_full2.rs | 28 ++++++ esp32/src/wifi/hw_stat_hop_err.rs | 28 ++++++ esp32/src/wifi/hw_stat_panic.rs | 28 ++++++ esp32/src/wifi/hw_stat_rx_end.rs | 28 ++++++ esp32/src/wifi/hw_stat_rx_success.rs | 28 ++++++ esp32/src/wifi/hw_stat_trcts.rs | 28 ++++++ esp32/src/wifi/hw_stat_trigger.rs | 28 ++++++ esp32/src/wifi/hw_stat_tx_ack.rs | 28 ++++++ esp32/src/wifi/hw_stat_tx_cts.rs | 28 ++++++ esp32/src/wifi/hw_stat_tx_hung.rs | 28 ++++++ esp32/src/wifi/hw_stat_tx_rts.rs | 28 ++++++ esp32/svd/patches/esp32-wifi.yaml | 77 +++++++++++++++++ 13 files changed, 503 insertions(+), 5 deletions(-) create mode 100644 esp32/src/wifi/hw_stat_full2.rs create mode 100644 esp32/src/wifi/hw_stat_hop_err.rs create mode 100644 esp32/src/wifi/hw_stat_panic.rs create mode 100644 esp32/src/wifi/hw_stat_rx_end.rs create mode 100644 esp32/src/wifi/hw_stat_rx_success.rs create mode 100644 esp32/src/wifi/hw_stat_trcts.rs create mode 100644 esp32/src/wifi/hw_stat_trigger.rs create mode 100644 esp32/src/wifi/hw_stat_tx_ack.rs create mode 100644 esp32/src/wifi/hw_stat_tx_cts.rs create mode 100644 esp32/src/wifi/hw_stat_tx_hung.rs create mode 100644 esp32/src/wifi/hw_stat_tx_rts.rs diff --git a/esp32/src/wifi.rs b/esp32/src/wifi.rs index 7381c6c58..7c73bf69e 100644 --- a/esp32/src/wifi.rs +++ b/esp32/src/wifi.rs @@ -10,20 +10,34 @@ pub struct RegisterBlock { rx_descr_last: RX_DESCR_LAST, _reserved5: [u8; 0x44], unknown_rx_policy: [UNKNOWN_RX_POLICY; 2], - _reserved6: [u8; 0x0b68], + _reserved6: [u8; 0x01ec], + hw_stat_rx_success: HW_STAT_RX_SUCCESS, + hw_stat_rx_end: HW_STAT_RX_END, + _reserved8: [u8; 0x04], + hw_stat_hop_err: HW_STAT_HOP_ERR, + hw_stat_full2: HW_STAT_FULL2, + _reserved10: [u8; 0x0968], wifi_int_status: WIFI_INT_STATUS, wifi_int_clear: WIFI_INT_CLEAR, - _reserved8: [u8; 0x68], + _reserved12: [u8; 0x68], ctrl: CTRL, tx_error_clear: TX_ERROR_CLEAR, tx_error_status: TX_ERROR_STATUS, tx_complete_clear: TX_COMPLETE_CLEAR, tx_complete_status: TX_COMPLETE_STATUS, - _reserved13: [u8; 0x30], + _reserved17: [u8; 0x30], tx_slot_config: [TX_SLOT_CONFIG; 5], - _reserved14: [u8; 0x0444], + _reserved18: [u8; 0x34], + hw_stat_tx_rts: HW_STAT_TX_RTS, + hw_stat_tx_cts: HW_STAT_TX_CTS, + hw_stat_tx_ack: HW_STAT_TX_ACK, + hw_stat_trcts: HW_STAT_TRCTS, + hw_stat_trigger: HW_STAT_TRIGGER, + hw_stat_tx_hung: HW_STAT_TX_HUNG, + hw_stat_panic: HW_STAT_PANIC, + _reserved25: [u8; 0x03f4], tx_slot_parameters: [TX_SLOT_PARAMETERS; 5], - _reserved15: [u8; 0x016c], + _reserved26: [u8; 0x016c], crypto_key_entry: [CRYPTO_KEY_ENTRY; 16], } impl RegisterBlock { @@ -69,6 +83,26 @@ impl RegisterBlock { pub fn unknown_rx_policy_iter(&self) -> impl Iterator { self.unknown_rx_policy.iter() } + #[doc = "0x2cc - "] + #[inline(always)] + pub const fn hw_stat_rx_success(&self) -> &HW_STAT_RX_SUCCESS { + &self.hw_stat_rx_success + } + #[doc = "0x2d0 - "] + #[inline(always)] + pub const fn hw_stat_rx_end(&self) -> &HW_STAT_RX_END { + &self.hw_stat_rx_end + } + #[doc = "0x2d8 - "] + #[inline(always)] + pub const fn hw_stat_hop_err(&self) -> &HW_STAT_HOP_ERR { + &self.hw_stat_hop_err + } + #[doc = "0x2dc - "] + #[inline(always)] + pub const fn hw_stat_full2(&self) -> &HW_STAT_FULL2 { + &self.hw_stat_full2 + } #[doc = "0xc48 - Interrupt status of WIFI peripheral"] #[inline(always)] pub const fn wifi_int_status(&self) -> &WIFI_INT_STATUS { @@ -115,6 +149,41 @@ impl RegisterBlock { pub fn tx_slot_config_iter(&self) -> impl Iterator { self.tx_slot_config.iter() } + #[doc = "0xd58 - "] + #[inline(always)] + pub const fn hw_stat_tx_rts(&self) -> &HW_STAT_TX_RTS { + &self.hw_stat_tx_rts + } + #[doc = "0xd5c - "] + #[inline(always)] + pub const fn hw_stat_tx_cts(&self) -> &HW_STAT_TX_CTS { + &self.hw_stat_tx_cts + } + #[doc = "0xd60 - "] + #[inline(always)] + pub const fn hw_stat_tx_ack(&self) -> &HW_STAT_TX_ACK { + &self.hw_stat_tx_ack + } + #[doc = "0xd64 - "] + #[inline(always)] + pub const fn hw_stat_trcts(&self) -> &HW_STAT_TRCTS { + &self.hw_stat_trcts + } + #[doc = "0xd68 - "] + #[inline(always)] + pub const fn hw_stat_trigger(&self) -> &HW_STAT_TRIGGER { + &self.hw_stat_trigger + } + #[doc = "0xd6c - "] + #[inline(always)] + pub const fn hw_stat_tx_hung(&self) -> &HW_STAT_TX_HUNG { + &self.hw_stat_tx_hung + } + #[doc = "0xd70 - "] + #[inline(always)] + pub const fn hw_stat_panic(&self) -> &HW_STAT_PANIC { + &self.hw_stat_panic + } #[doc = "0x1168..0x1294 - Used to set transmission parameters for the slot"] #[inline(always)] pub const fn tx_slot_parameters(&self, n: usize) -> &TX_SLOT_PARAMETERS { @@ -158,6 +227,22 @@ pub mod rx_descr_last; pub type UNKNOWN_RX_POLICY = crate::Reg; #[doc = ""] pub mod unknown_rx_policy; +#[doc = "HW_STAT_RX_SUCCESS (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rx_success::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rx_success::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_rx_success`] module"] +pub type HW_STAT_RX_SUCCESS = crate::Reg; +#[doc = ""] +pub mod hw_stat_rx_success; +#[doc = "HW_STAT_RX_END (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rx_end::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rx_end::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_rx_end`] module"] +pub type HW_STAT_RX_END = crate::Reg; +#[doc = ""] +pub mod hw_stat_rx_end; +#[doc = "HW_STAT_HOP_ERR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_hop_err::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_hop_err::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_hop_err`] module"] +pub type HW_STAT_HOP_ERR = crate::Reg; +#[doc = ""] +pub mod hw_stat_hop_err; +#[doc = "HW_STAT_FULL2 (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_full2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_full2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_full2`] module"] +pub type HW_STAT_FULL2 = crate::Reg; +#[doc = ""] +pub mod hw_stat_full2; #[doc = "WIFI_INT_STATUS (rw) register accessor: Interrupt status of WIFI peripheral\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_int_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_int_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_int_status`] module"] pub type WIFI_INT_STATUS = crate::Reg; #[doc = "Interrupt status of WIFI peripheral"] @@ -186,6 +271,34 @@ pub mod tx_complete_clear; pub type TX_COMPLETE_STATUS = crate::Reg; #[doc = "Completion status of a slot"] pub mod tx_complete_status; +#[doc = "HW_STAT_TX_RTS (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_tx_rts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_tx_rts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_tx_rts`] module"] +pub type HW_STAT_TX_RTS = crate::Reg; +#[doc = ""] +pub mod hw_stat_tx_rts; +#[doc = "HW_STAT_TX_CTS (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_tx_cts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_tx_cts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_tx_cts`] module"] +pub type HW_STAT_TX_CTS = crate::Reg; +#[doc = ""] +pub mod hw_stat_tx_cts; +#[doc = "HW_STAT_TX_ACK (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_tx_ack::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_tx_ack::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_tx_ack`] module"] +pub type HW_STAT_TX_ACK = crate::Reg; +#[doc = ""] +pub mod hw_stat_tx_ack; +#[doc = "HW_STAT_TRCTS (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_trcts::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_trcts::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_trcts`] module"] +pub type HW_STAT_TRCTS = crate::Reg; +#[doc = ""] +pub mod hw_stat_trcts; +#[doc = "HW_STAT_TRIGGER (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_trigger`] module"] +pub type HW_STAT_TRIGGER = crate::Reg; +#[doc = ""] +pub mod hw_stat_trigger; +#[doc = "HW_STAT_TX_HUNG (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_tx_hung::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_tx_hung::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_tx_hung`] module"] +pub type HW_STAT_TX_HUNG = crate::Reg; +#[doc = ""] +pub mod hw_stat_tx_hung; +#[doc = "HW_STAT_PANIC (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_panic::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_panic::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_panic`] module"] +pub type HW_STAT_PANIC = crate::Reg; +#[doc = ""] +pub mod hw_stat_panic; #[doc = "Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] pub use self::filter_bank::FILTER_BANK; #[doc = r"Cluster"] diff --git a/esp32/src/wifi/hw_stat_full2.rs b/esp32/src/wifi/hw_stat_full2.rs new file mode 100644 index 000000000..71aaf0b45 --- /dev/null +++ b/esp32/src/wifi/hw_stat_full2.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_FULL2` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_FULL2` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_full2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_full2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_FULL2_SPEC; +impl crate::RegisterSpec for HW_STAT_FULL2_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_full2::R`](R) reader structure"] +impl crate::Readable for HW_STAT_FULL2_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_full2::W`](W) writer structure"] +impl crate::Writable for HW_STAT_FULL2_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_FULL2 to value 0"] +impl crate::Resettable for HW_STAT_FULL2_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_hop_err.rs b/esp32/src/wifi/hw_stat_hop_err.rs new file mode 100644 index 000000000..7a1e9ae7b --- /dev/null +++ b/esp32/src/wifi/hw_stat_hop_err.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_HOP_ERR` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_HOP_ERR` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_hop_err::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_hop_err::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_HOP_ERR_SPEC; +impl crate::RegisterSpec for HW_STAT_HOP_ERR_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_hop_err::R`](R) reader structure"] +impl crate::Readable for HW_STAT_HOP_ERR_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_hop_err::W`](W) writer structure"] +impl crate::Writable for HW_STAT_HOP_ERR_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_HOP_ERR to value 0"] +impl crate::Resettable for HW_STAT_HOP_ERR_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_panic.rs b/esp32/src/wifi/hw_stat_panic.rs new file mode 100644 index 000000000..2cbd49b08 --- /dev/null +++ b/esp32/src/wifi/hw_stat_panic.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_PANIC` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_PANIC` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_panic::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_panic::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_PANIC_SPEC; +impl crate::RegisterSpec for HW_STAT_PANIC_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_panic::R`](R) reader structure"] +impl crate::Readable for HW_STAT_PANIC_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_panic::W`](W) writer structure"] +impl crate::Writable for HW_STAT_PANIC_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_PANIC to value 0"] +impl crate::Resettable for HW_STAT_PANIC_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_rx_end.rs b/esp32/src/wifi/hw_stat_rx_end.rs new file mode 100644 index 000000000..6124a0a66 --- /dev/null +++ b/esp32/src/wifi/hw_stat_rx_end.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_RX_END` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_RX_END` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rx_end::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rx_end::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_RX_END_SPEC; +impl crate::RegisterSpec for HW_STAT_RX_END_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_rx_end::R`](R) reader structure"] +impl crate::Readable for HW_STAT_RX_END_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_rx_end::W`](W) writer structure"] +impl crate::Writable for HW_STAT_RX_END_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_RX_END to value 0"] +impl crate::Resettable for HW_STAT_RX_END_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_rx_success.rs b/esp32/src/wifi/hw_stat_rx_success.rs new file mode 100644 index 000000000..3f141e3e8 --- /dev/null +++ b/esp32/src/wifi/hw_stat_rx_success.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_RX_SUCCESS` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_RX_SUCCESS` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rx_success::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rx_success::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_RX_SUCCESS_SPEC; +impl crate::RegisterSpec for HW_STAT_RX_SUCCESS_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_rx_success::R`](R) reader structure"] +impl crate::Readable for HW_STAT_RX_SUCCESS_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_rx_success::W`](W) writer structure"] +impl crate::Writable for HW_STAT_RX_SUCCESS_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_RX_SUCCESS to value 0"] +impl crate::Resettable for HW_STAT_RX_SUCCESS_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_trcts.rs b/esp32/src/wifi/hw_stat_trcts.rs new file mode 100644 index 000000000..dae567a0d --- /dev/null +++ b/esp32/src/wifi/hw_stat_trcts.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_TRCTS` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_TRCTS` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_trcts::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_trcts::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_TRCTS_SPEC; +impl crate::RegisterSpec for HW_STAT_TRCTS_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_trcts::R`](R) reader structure"] +impl crate::Readable for HW_STAT_TRCTS_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_trcts::W`](W) writer structure"] +impl crate::Writable for HW_STAT_TRCTS_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_TRCTS to value 0"] +impl crate::Resettable for HW_STAT_TRCTS_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_trigger.rs b/esp32/src/wifi/hw_stat_trigger.rs new file mode 100644 index 000000000..2da5fbfd1 --- /dev/null +++ b/esp32/src/wifi/hw_stat_trigger.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_TRIGGER` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_TRIGGER` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_TRIGGER_SPEC; +impl crate::RegisterSpec for HW_STAT_TRIGGER_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_trigger::R`](R) reader structure"] +impl crate::Readable for HW_STAT_TRIGGER_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_trigger::W`](W) writer structure"] +impl crate::Writable for HW_STAT_TRIGGER_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_TRIGGER to value 0"] +impl crate::Resettable for HW_STAT_TRIGGER_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_tx_ack.rs b/esp32/src/wifi/hw_stat_tx_ack.rs new file mode 100644 index 000000000..98dbdda4d --- /dev/null +++ b/esp32/src/wifi/hw_stat_tx_ack.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_TX_ACK` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_TX_ACK` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_tx_ack::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_tx_ack::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_TX_ACK_SPEC; +impl crate::RegisterSpec for HW_STAT_TX_ACK_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_tx_ack::R`](R) reader structure"] +impl crate::Readable for HW_STAT_TX_ACK_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_tx_ack::W`](W) writer structure"] +impl crate::Writable for HW_STAT_TX_ACK_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_TX_ACK to value 0"] +impl crate::Resettable for HW_STAT_TX_ACK_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_tx_cts.rs b/esp32/src/wifi/hw_stat_tx_cts.rs new file mode 100644 index 000000000..1c8b94926 --- /dev/null +++ b/esp32/src/wifi/hw_stat_tx_cts.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_TX_CTS` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_TX_CTS` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_tx_cts::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_tx_cts::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_TX_CTS_SPEC; +impl crate::RegisterSpec for HW_STAT_TX_CTS_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_tx_cts::R`](R) reader structure"] +impl crate::Readable for HW_STAT_TX_CTS_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_tx_cts::W`](W) writer structure"] +impl crate::Writable for HW_STAT_TX_CTS_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_TX_CTS to value 0"] +impl crate::Resettable for HW_STAT_TX_CTS_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_tx_hung.rs b/esp32/src/wifi/hw_stat_tx_hung.rs new file mode 100644 index 000000000..02a85285c --- /dev/null +++ b/esp32/src/wifi/hw_stat_tx_hung.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_TX_HUNG` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_TX_HUNG` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_tx_hung::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_tx_hung::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_TX_HUNG_SPEC; +impl crate::RegisterSpec for HW_STAT_TX_HUNG_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_tx_hung::R`](R) reader structure"] +impl crate::Readable for HW_STAT_TX_HUNG_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_tx_hung::W`](W) writer structure"] +impl crate::Writable for HW_STAT_TX_HUNG_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_TX_HUNG to value 0"] +impl crate::Resettable for HW_STAT_TX_HUNG_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_tx_rts.rs b/esp32/src/wifi/hw_stat_tx_rts.rs new file mode 100644 index 000000000..c7c3d8e0c --- /dev/null +++ b/esp32/src/wifi/hw_stat_tx_rts.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_TX_RTS` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_TX_RTS` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_tx_rts::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_tx_rts::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_TX_RTS_SPEC; +impl crate::RegisterSpec for HW_STAT_TX_RTS_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_tx_rts::R`](R) reader structure"] +impl crate::Readable for HW_STAT_TX_RTS_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_tx_rts::W`](W) writer structure"] +impl crate::Writable for HW_STAT_TX_RTS_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_TX_RTS to value 0"] +impl crate::Resettable for HW_STAT_TX_RTS_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/svd/patches/esp32-wifi.yaml b/esp32/svd/patches/esp32-wifi.yaml index cebc09e46..ab1d9627c 100644 --- a/esp32/svd/patches/esp32-wifi.yaml +++ b/esp32/svd/patches/esp32-wifi.yaml @@ -15,6 +15,7 @@ _add: size: 0x2000 usage: registers registers: + RX_CTRL: description: Controls the reception of frames addressOffset: 0x84 @@ -28,23 +29,64 @@ _add: bitOffset: 31 bitWidth: 1 description: Enable frame reception + RX_DESCR_BASE: description: base address of the RX DMA list addressOffset: 0x88 acccess: read-write + RX_DESCR_NEXT: description: next item in the RX DMA list addressOffset: 0x8c access: read-write + RX_DESCR_LAST: description: last item in RX DMA list addressOffset: 0x90 access: read-write + UNKNOWN_RX_POLICY%s: dim: 2 dimIncrement: 4 addressOffset: 0xd8 access: read-write + + HW_STAT_ACK_INT: + addressOffset: 0x2bc + access: read + + HW_STAT_RTS_INT: + addressOffset: 0x2c0 + access: read + + HW_STAT_CTS_INT: + addressOffset: 0x2c4 + access: read + + HW_STAT_RIFS_INT: + addressOffset: 0x2c8 + access: read + + HW_STAT_RX_SUCCESS: + addressOffset: 0x2cc + access: read + + HW_STAT_RX_END: + addressOffset: 0x2d0 + access: read + + HW_STAT_HOP_ERR: + addressOffset: 0x2d8 + access: read + + HW_STAT_FULL2: + addressOffset: 0x2dc + access: read + + HW_STAT_BLOCK_ERR: + addressOffset: 0x2e0 + access: read + WIFI_INT_STATUS: description: Interrupt status of WIFI peripheral addressOffset: 0xc48 @@ -62,14 +104,17 @@ _add: description: Indicates a timeout, while transmitting bitOffset: 19 bitWidth: 1 + WIFI_INT_CLEAR: description: Interrupt status clear of WIFI peripheral addressOffset: 0xc4c access: write + CTRL: description: Exact name and meaning unknown, used for initializing the MAC addressOffset: 0xcb8 access: read-write + TX_ERROR_CLEAR: description: Clear the error status of a slot addressOffset: 0xcbc @@ -81,6 +126,7 @@ _add: SLOT_TIMEOUT: bitOffset: 0x10 bitWidth: 5 + TX_ERROR_STATUS: description: Error status of a slot addressOffset: 0xcc0 @@ -92,6 +138,7 @@ _add: SLOT_TIMEOUT: bitOffset: 0x10 bitWidth: 5 + TX_COMPLETE_CLEAR: description: Clear the completion status of a slot addressOffset: 0xcc4 @@ -100,6 +147,7 @@ _add: SLOTS: bitOffset: 0 bitWidth: 5 + TX_COMPLETE_STATUS: description: Completion status of a slot addressOffset: 0xcc8 @@ -108,6 +156,35 @@ _add: SLOTS: bitOffset: 0 bitWidth: 5 + + HW_STAT_TX_RTS: + addressOffset: 0xd58 + access: read + + HW_STAT_TX_CTS: + addressOffset: 0xd5c + access: read + + HW_STAT_TX_ACK: + addressOffset: 0xd60 + access: read + + HW_STAT_TRCTS: + addressOffset: 0xd64 + access: read + + HW_STAT_TRIGGER: + addressOffset: 0xd68 + access: read + + HW_STAT_TX_HUNG: + addressOffset: 0xd6c + access: read + + HW_STAT_PANIC: + addressOffset: 0xd70 + access: read + WIFI: _add: _clusters: From c4f46a1bf3955ee9c1f76519eabbfc7076a2512a Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Tue, 22 Oct 2024 21:01:17 +0200 Subject: [PATCH 4/8] Regenerated PAC. --- esp32/src/wifi.rs | 66 +++++++++++++++++++++++++---- esp32/src/wifi/hw_stat_ack_int.rs | 28 ++++++++++++ esp32/src/wifi/hw_stat_block_err.rs | 28 ++++++++++++ esp32/src/wifi/hw_stat_cts_int.rs | 28 ++++++++++++ esp32/src/wifi/hw_stat_rifs_int.rs | 28 ++++++++++++ esp32/src/wifi/hw_stat_rts_int.rs | 28 ++++++++++++ 6 files changed, 198 insertions(+), 8 deletions(-) create mode 100644 esp32/src/wifi/hw_stat_ack_int.rs create mode 100644 esp32/src/wifi/hw_stat_block_err.rs create mode 100644 esp32/src/wifi/hw_stat_cts_int.rs create mode 100644 esp32/src/wifi/hw_stat_rifs_int.rs create mode 100644 esp32/src/wifi/hw_stat_rts_int.rs diff --git a/esp32/src/wifi.rs b/esp32/src/wifi.rs index 7c73bf69e..9f602c531 100644 --- a/esp32/src/wifi.rs +++ b/esp32/src/wifi.rs @@ -10,24 +10,29 @@ pub struct RegisterBlock { rx_descr_last: RX_DESCR_LAST, _reserved5: [u8; 0x44], unknown_rx_policy: [UNKNOWN_RX_POLICY; 2], - _reserved6: [u8; 0x01ec], + _reserved6: [u8; 0x01dc], + hw_stat_ack_int: HW_STAT_ACK_INT, + hw_stat_rts_int: HW_STAT_RTS_INT, + hw_stat_cts_int: HW_STAT_CTS_INT, + hw_stat_rifs_int: HW_STAT_RIFS_INT, hw_stat_rx_success: HW_STAT_RX_SUCCESS, hw_stat_rx_end: HW_STAT_RX_END, - _reserved8: [u8; 0x04], + _reserved12: [u8; 0x04], hw_stat_hop_err: HW_STAT_HOP_ERR, hw_stat_full2: HW_STAT_FULL2, - _reserved10: [u8; 0x0968], + hw_stat_block_err: HW_STAT_BLOCK_ERR, + _reserved15: [u8; 0x0964], wifi_int_status: WIFI_INT_STATUS, wifi_int_clear: WIFI_INT_CLEAR, - _reserved12: [u8; 0x68], + _reserved17: [u8; 0x68], ctrl: CTRL, tx_error_clear: TX_ERROR_CLEAR, tx_error_status: TX_ERROR_STATUS, tx_complete_clear: TX_COMPLETE_CLEAR, tx_complete_status: TX_COMPLETE_STATUS, - _reserved17: [u8; 0x30], + _reserved22: [u8; 0x30], tx_slot_config: [TX_SLOT_CONFIG; 5], - _reserved18: [u8; 0x34], + _reserved23: [u8; 0x34], hw_stat_tx_rts: HW_STAT_TX_RTS, hw_stat_tx_cts: HW_STAT_TX_CTS, hw_stat_tx_ack: HW_STAT_TX_ACK, @@ -35,9 +40,9 @@ pub struct RegisterBlock { hw_stat_trigger: HW_STAT_TRIGGER, hw_stat_tx_hung: HW_STAT_TX_HUNG, hw_stat_panic: HW_STAT_PANIC, - _reserved25: [u8; 0x03f4], + _reserved30: [u8; 0x03f4], tx_slot_parameters: [TX_SLOT_PARAMETERS; 5], - _reserved26: [u8; 0x016c], + _reserved31: [u8; 0x016c], crypto_key_entry: [CRYPTO_KEY_ENTRY; 16], } impl RegisterBlock { @@ -83,6 +88,26 @@ impl RegisterBlock { pub fn unknown_rx_policy_iter(&self) -> impl Iterator { self.unknown_rx_policy.iter() } + #[doc = "0x2bc - "] + #[inline(always)] + pub const fn hw_stat_ack_int(&self) -> &HW_STAT_ACK_INT { + &self.hw_stat_ack_int + } + #[doc = "0x2c0 - "] + #[inline(always)] + pub const fn hw_stat_rts_int(&self) -> &HW_STAT_RTS_INT { + &self.hw_stat_rts_int + } + #[doc = "0x2c4 - "] + #[inline(always)] + pub const fn hw_stat_cts_int(&self) -> &HW_STAT_CTS_INT { + &self.hw_stat_cts_int + } + #[doc = "0x2c8 - "] + #[inline(always)] + pub const fn hw_stat_rifs_int(&self) -> &HW_STAT_RIFS_INT { + &self.hw_stat_rifs_int + } #[doc = "0x2cc - "] #[inline(always)] pub const fn hw_stat_rx_success(&self) -> &HW_STAT_RX_SUCCESS { @@ -103,6 +128,11 @@ impl RegisterBlock { pub const fn hw_stat_full2(&self) -> &HW_STAT_FULL2 { &self.hw_stat_full2 } + #[doc = "0x2e0 - "] + #[inline(always)] + pub const fn hw_stat_block_err(&self) -> &HW_STAT_BLOCK_ERR { + &self.hw_stat_block_err + } #[doc = "0xc48 - Interrupt status of WIFI peripheral"] #[inline(always)] pub const fn wifi_int_status(&self) -> &WIFI_INT_STATUS { @@ -227,6 +257,22 @@ pub mod rx_descr_last; pub type UNKNOWN_RX_POLICY = crate::Reg; #[doc = ""] pub mod unknown_rx_policy; +#[doc = "HW_STAT_ACK_INT (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_ack_int::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_ack_int::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_ack_int`] module"] +pub type HW_STAT_ACK_INT = crate::Reg; +#[doc = ""] +pub mod hw_stat_ack_int; +#[doc = "HW_STAT_RTS_INT (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rts_int::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rts_int::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_rts_int`] module"] +pub type HW_STAT_RTS_INT = crate::Reg; +#[doc = ""] +pub mod hw_stat_rts_int; +#[doc = "HW_STAT_CTS_INT (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_cts_int::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_cts_int::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_cts_int`] module"] +pub type HW_STAT_CTS_INT = crate::Reg; +#[doc = ""] +pub mod hw_stat_cts_int; +#[doc = "HW_STAT_RIFS_INT (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rifs_int::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rifs_int::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_rifs_int`] module"] +pub type HW_STAT_RIFS_INT = crate::Reg; +#[doc = ""] +pub mod hw_stat_rifs_int; #[doc = "HW_STAT_RX_SUCCESS (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rx_success::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rx_success::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_rx_success`] module"] pub type HW_STAT_RX_SUCCESS = crate::Reg; #[doc = ""] @@ -243,6 +289,10 @@ pub mod hw_stat_hop_err; pub type HW_STAT_FULL2 = crate::Reg; #[doc = ""] pub mod hw_stat_full2; +#[doc = "HW_STAT_BLOCK_ERR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_block_err::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_block_err::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_block_err`] module"] +pub type HW_STAT_BLOCK_ERR = crate::Reg; +#[doc = ""] +pub mod hw_stat_block_err; #[doc = "WIFI_INT_STATUS (rw) register accessor: Interrupt status of WIFI peripheral\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_int_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_int_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_int_status`] module"] pub type WIFI_INT_STATUS = crate::Reg; #[doc = "Interrupt status of WIFI peripheral"] diff --git a/esp32/src/wifi/hw_stat_ack_int.rs b/esp32/src/wifi/hw_stat_ack_int.rs new file mode 100644 index 000000000..a983cc07c --- /dev/null +++ b/esp32/src/wifi/hw_stat_ack_int.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_ACK_INT` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_ACK_INT` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_ack_int::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_ack_int::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_ACK_INT_SPEC; +impl crate::RegisterSpec for HW_STAT_ACK_INT_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_ack_int::R`](R) reader structure"] +impl crate::Readable for HW_STAT_ACK_INT_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_ack_int::W`](W) writer structure"] +impl crate::Writable for HW_STAT_ACK_INT_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_ACK_INT to value 0"] +impl crate::Resettable for HW_STAT_ACK_INT_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_block_err.rs b/esp32/src/wifi/hw_stat_block_err.rs new file mode 100644 index 000000000..73723d493 --- /dev/null +++ b/esp32/src/wifi/hw_stat_block_err.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_BLOCK_ERR` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_BLOCK_ERR` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_block_err::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_block_err::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_BLOCK_ERR_SPEC; +impl crate::RegisterSpec for HW_STAT_BLOCK_ERR_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_block_err::R`](R) reader structure"] +impl crate::Readable for HW_STAT_BLOCK_ERR_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_block_err::W`](W) writer structure"] +impl crate::Writable for HW_STAT_BLOCK_ERR_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_BLOCK_ERR to value 0"] +impl crate::Resettable for HW_STAT_BLOCK_ERR_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_cts_int.rs b/esp32/src/wifi/hw_stat_cts_int.rs new file mode 100644 index 000000000..d64e4ec3f --- /dev/null +++ b/esp32/src/wifi/hw_stat_cts_int.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_CTS_INT` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_CTS_INT` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_cts_int::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_cts_int::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_CTS_INT_SPEC; +impl crate::RegisterSpec for HW_STAT_CTS_INT_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_cts_int::R`](R) reader structure"] +impl crate::Readable for HW_STAT_CTS_INT_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_cts_int::W`](W) writer structure"] +impl crate::Writable for HW_STAT_CTS_INT_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_CTS_INT to value 0"] +impl crate::Resettable for HW_STAT_CTS_INT_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_rifs_int.rs b/esp32/src/wifi/hw_stat_rifs_int.rs new file mode 100644 index 000000000..8135cf292 --- /dev/null +++ b/esp32/src/wifi/hw_stat_rifs_int.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_RIFS_INT` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_RIFS_INT` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rifs_int::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rifs_int::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_RIFS_INT_SPEC; +impl crate::RegisterSpec for HW_STAT_RIFS_INT_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_rifs_int::R`](R) reader structure"] +impl crate::Readable for HW_STAT_RIFS_INT_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_rifs_int::W`](W) writer structure"] +impl crate::Writable for HW_STAT_RIFS_INT_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_RIFS_INT to value 0"] +impl crate::Resettable for HW_STAT_RIFS_INT_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/src/wifi/hw_stat_rts_int.rs b/esp32/src/wifi/hw_stat_rts_int.rs new file mode 100644 index 000000000..abc557bba --- /dev/null +++ b/esp32/src/wifi/hw_stat_rts_int.rs @@ -0,0 +1,28 @@ +#[doc = "Register `HW_STAT_RTS_INT` reader"] +pub type R = crate::R; +#[doc = "Register `HW_STAT_RTS_INT` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rts_int::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rts_int::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HW_STAT_RTS_INT_SPEC; +impl crate::RegisterSpec for HW_STAT_RTS_INT_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`hw_stat_rts_int::R`](R) reader structure"] +impl crate::Readable for HW_STAT_RTS_INT_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hw_stat_rts_int::W`](W) writer structure"] +impl crate::Writable for HW_STAT_RTS_INT_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets HW_STAT_RTS_INT to value 0"] +impl crate::Resettable for HW_STAT_RTS_INT_SPEC { + const RESET_VALUE: u32 = 0; +} From 6bc584dba76d58065526bd0b5def657d04db0c8b Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Tue, 22 Oct 2024 22:50:54 +0200 Subject: [PATCH 5/8] Fixed addressOffset fields for filters. --- esp32/src/wifi.rs | 6 +++--- esp32/src/wifi/filter_bank.rs | 20 ++++++++++---------- esp32/svd/patches/esp32-wifi.yaml | 6 +++--- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/esp32/src/wifi.rs b/esp32/src/wifi.rs index 9f602c531..f846506af 100644 --- a/esp32/src/wifi.rs +++ b/esp32/src/wifi.rs @@ -3,7 +3,7 @@ #[doc = "Register block"] pub struct RegisterBlock { filter_bank: [FILTER_BANK; 2], - _reserved1: [u8; 0x04], + _reserved1: [u8; 0x44], rx_ctrl: RX_CTRL, rx_descr_base: RX_DESCR_BASE, rx_descr_next: RX_DESCR_NEXT, @@ -46,13 +46,13 @@ pub struct RegisterBlock { crypto_key_entry: [CRYPTO_KEY_ENTRY; 16], } impl RegisterBlock { - #[doc = "0x00..0x80 - Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] + #[doc = "0x00..0x40 - Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] #[inline(always)] pub const fn filter_bank(&self, n: usize) -> &FILTER_BANK { &self.filter_bank[n] } #[doc = "Iterator for array of:"] - #[doc = "0x00..0x80 - Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] + #[doc = "0x00..0x40 - Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] #[inline(always)] pub fn filter_bank_iter(&self) -> impl Iterator { self.filter_bank.iter() diff --git a/esp32/src/wifi/filter_bank.rs b/esp32/src/wifi/filter_bank.rs index cac866ef2..dbfbfe4a1 100644 --- a/esp32/src/wifi/filter_bank.rs +++ b/esp32/src/wifi/filter_bank.rs @@ -5,11 +5,11 @@ pub struct FILTER_BANK { addr_low: (), _reserved1: [u8; 0x04], addr_high: (), - _reserved2: [u8; 0x1c], + _reserved2: [u8; 0x0c], mask_low: (), _reserved3: [u8; 0x04], mask_high: (), - _reserved_end: [u8; 0x1c], + _reserved_end: [u8; 0x0c], } impl FILTER_BANK { #[doc = "0x00..0x08 - First 4 bytes of BSSID MAC address filter"] @@ -40,33 +40,33 @@ impl FILTER_BANK { (0..2) .map(move |n| unsafe { &*(self as *const Self).cast::().add(4).add(8 * n).cast() }) } - #[doc = "0x20..0x28 - First 4 bytes of BSSID MAC address filter mask"] + #[doc = "0x10..0x18 - First 4 bytes of BSSID MAC address filter mask"] #[inline(always)] pub const fn mask_low(&self, n: usize) -> &MASK_LOW { #[allow(clippy::no_effect)] [(); 2][n]; - unsafe { &*(self as *const Self).cast::().add(32).add(8 * n).cast() } + unsafe { &*(self as *const Self).cast::().add(16).add(8 * n).cast() } } #[doc = "Iterator for array of:"] - #[doc = "0x20..0x28 - First 4 bytes of BSSID MAC address filter mask"] + #[doc = "0x10..0x18 - First 4 bytes of BSSID MAC address filter mask"] #[inline(always)] pub fn mask_low_iter(&self) -> impl Iterator { (0..2) - .map(move |n| unsafe { &*(self as *const Self).cast::().add(32).add(8 * n).cast() }) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(16).add(8 * n).cast() }) } - #[doc = "0x24..0x2c - last 2 bytes of BSSID MAC address filter mask"] + #[doc = "0x14..0x1c - last 2 bytes of BSSID MAC address filter mask"] #[inline(always)] pub const fn mask_high(&self, n: usize) -> &MASK_HIGH { #[allow(clippy::no_effect)] [(); 2][n]; - unsafe { &*(self as *const Self).cast::().add(36).add(8 * n).cast() } + unsafe { &*(self as *const Self).cast::().add(20).add(8 * n).cast() } } #[doc = "Iterator for array of:"] - #[doc = "0x24..0x2c - last 2 bytes of BSSID MAC address filter mask"] + #[doc = "0x14..0x1c - last 2 bytes of BSSID MAC address filter mask"] #[inline(always)] pub fn mask_high_iter(&self) -> impl Iterator { (0..2) - .map(move |n| unsafe { &*(self as *const Self).cast::().add(36).add(8 * n).cast() }) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(20).add(8 * n).cast() }) } } #[doc = "ADDR_LOW (rw) register accessor: First 4 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`addr_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr_low`] module"] diff --git a/esp32/svd/patches/esp32-wifi.yaml b/esp32/svd/patches/esp32-wifi.yaml index ab1d9627c..c1d976fb2 100644 --- a/esp32/svd/patches/esp32-wifi.yaml +++ b/esp32/svd/patches/esp32-wifi.yaml @@ -190,7 +190,7 @@ WIFI: _clusters: FILTER_BANK%s: dim: 2 - dimIncrement: 0x40 + dimIncrement: 0x20 addressOffset: 0x0 description: " Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. @@ -218,13 +218,13 @@ WIFI: dim: 2 dimIncrement: 0x8 description: First 4 bytes of BSSID MAC address filter mask - addressOffset: 0x20 + addressOffset: 0x10 access: read-write MASK_HIGH%s: dim: 2 dimIncrement: 0x8 description: last 2 bytes of BSSID MAC address filter mask - addressOffset: 0x24 + addressOffset: 0x14 access: read-write fields: MASK: From 755e9a1eaf5dff60e464a39e52e6f844fae32175 Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Tue, 22 Oct 2024 23:12:00 +0200 Subject: [PATCH 6/8] Revert "Fixed addressOffset fields for filters." This reverts commit 6bc584dba76d58065526bd0b5def657d04db0c8b. --- esp32/src/wifi.rs | 6 +++--- esp32/src/wifi/filter_bank.rs | 20 ++++++++++---------- esp32/svd/patches/esp32-wifi.yaml | 6 +++--- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/esp32/src/wifi.rs b/esp32/src/wifi.rs index f846506af..9f602c531 100644 --- a/esp32/src/wifi.rs +++ b/esp32/src/wifi.rs @@ -3,7 +3,7 @@ #[doc = "Register block"] pub struct RegisterBlock { filter_bank: [FILTER_BANK; 2], - _reserved1: [u8; 0x44], + _reserved1: [u8; 0x04], rx_ctrl: RX_CTRL, rx_descr_base: RX_DESCR_BASE, rx_descr_next: RX_DESCR_NEXT, @@ -46,13 +46,13 @@ pub struct RegisterBlock { crypto_key_entry: [CRYPTO_KEY_ENTRY; 16], } impl RegisterBlock { - #[doc = "0x00..0x40 - Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] + #[doc = "0x00..0x80 - Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] #[inline(always)] pub const fn filter_bank(&self, n: usize) -> &FILTER_BANK { &self.filter_bank[n] } #[doc = "Iterator for array of:"] - #[doc = "0x00..0x40 - Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] + #[doc = "0x00..0x80 - Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces."] #[inline(always)] pub fn filter_bank_iter(&self) -> impl Iterator { self.filter_bank.iter() diff --git a/esp32/src/wifi/filter_bank.rs b/esp32/src/wifi/filter_bank.rs index dbfbfe4a1..cac866ef2 100644 --- a/esp32/src/wifi/filter_bank.rs +++ b/esp32/src/wifi/filter_bank.rs @@ -5,11 +5,11 @@ pub struct FILTER_BANK { addr_low: (), _reserved1: [u8; 0x04], addr_high: (), - _reserved2: [u8; 0x0c], + _reserved2: [u8; 0x1c], mask_low: (), _reserved3: [u8; 0x04], mask_high: (), - _reserved_end: [u8; 0x0c], + _reserved_end: [u8; 0x1c], } impl FILTER_BANK { #[doc = "0x00..0x08 - First 4 bytes of BSSID MAC address filter"] @@ -40,33 +40,33 @@ impl FILTER_BANK { (0..2) .map(move |n| unsafe { &*(self as *const Self).cast::().add(4).add(8 * n).cast() }) } - #[doc = "0x10..0x18 - First 4 bytes of BSSID MAC address filter mask"] + #[doc = "0x20..0x28 - First 4 bytes of BSSID MAC address filter mask"] #[inline(always)] pub const fn mask_low(&self, n: usize) -> &MASK_LOW { #[allow(clippy::no_effect)] [(); 2][n]; - unsafe { &*(self as *const Self).cast::().add(16).add(8 * n).cast() } + unsafe { &*(self as *const Self).cast::().add(32).add(8 * n).cast() } } #[doc = "Iterator for array of:"] - #[doc = "0x10..0x18 - First 4 bytes of BSSID MAC address filter mask"] + #[doc = "0x20..0x28 - First 4 bytes of BSSID MAC address filter mask"] #[inline(always)] pub fn mask_low_iter(&self) -> impl Iterator { (0..2) - .map(move |n| unsafe { &*(self as *const Self).cast::().add(16).add(8 * n).cast() }) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(32).add(8 * n).cast() }) } - #[doc = "0x14..0x1c - last 2 bytes of BSSID MAC address filter mask"] + #[doc = "0x24..0x2c - last 2 bytes of BSSID MAC address filter mask"] #[inline(always)] pub const fn mask_high(&self, n: usize) -> &MASK_HIGH { #[allow(clippy::no_effect)] [(); 2][n]; - unsafe { &*(self as *const Self).cast::().add(20).add(8 * n).cast() } + unsafe { &*(self as *const Self).cast::().add(36).add(8 * n).cast() } } #[doc = "Iterator for array of:"] - #[doc = "0x14..0x1c - last 2 bytes of BSSID MAC address filter mask"] + #[doc = "0x24..0x2c - last 2 bytes of BSSID MAC address filter mask"] #[inline(always)] pub fn mask_high_iter(&self) -> impl Iterator { (0..2) - .map(move |n| unsafe { &*(self as *const Self).cast::().add(20).add(8 * n).cast() }) + .map(move |n| unsafe { &*(self as *const Self).cast::().add(36).add(8 * n).cast() }) } } #[doc = "ADDR_LOW (rw) register accessor: First 4 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`addr_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr_low`] module"] diff --git a/esp32/svd/patches/esp32-wifi.yaml b/esp32/svd/patches/esp32-wifi.yaml index c1d976fb2..ab1d9627c 100644 --- a/esp32/svd/patches/esp32-wifi.yaml +++ b/esp32/svd/patches/esp32-wifi.yaml @@ -190,7 +190,7 @@ WIFI: _clusters: FILTER_BANK%s: dim: 2 - dimIncrement: 0x20 + dimIncrement: 0x40 addressOffset: 0x0 description: " Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. @@ -218,13 +218,13 @@ WIFI: dim: 2 dimIncrement: 0x8 description: First 4 bytes of BSSID MAC address filter mask - addressOffset: 0x10 + addressOffset: 0x20 access: read-write MASK_HIGH%s: dim: 2 dimIncrement: 0x8 description: last 2 bytes of BSSID MAC address filter mask - addressOffset: 0x14 + addressOffset: 0x24 access: read-write fields: MASK: From 4c8201dd94841221c0a7c93e97648274915ac7a9 Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Wed, 30 Oct 2024 21:37:36 +0100 Subject: [PATCH 7/8] Added unknown PMD register. --- esp32/src/wifi/tx_slot_parameters.rs | 13 ++++++++++- esp32/src/wifi/tx_slot_parameters/pmd.rs | 28 ++++++++++++++++++++++++ esp32/svd/patches/esp32-wifi.yaml | 5 ++++- 3 files changed, 44 insertions(+), 2 deletions(-) create mode 100644 esp32/src/wifi/tx_slot_parameters/pmd.rs diff --git a/esp32/src/wifi/tx_slot_parameters.rs b/esp32/src/wifi/tx_slot_parameters.rs index 0464d208d..29df047b7 100644 --- a/esp32/src/wifi/tx_slot_parameters.rs +++ b/esp32/src/wifi/tx_slot_parameters.rs @@ -7,7 +7,9 @@ pub struct TX_SLOT_PARAMETERS { ht_sig: HT_SIG, ht_unknown: HT_UNKNOWN, duration: DURATION, - _reserved_end: [u8; 0x28], + _reserved5: [u8; 0x04], + pmd: PMD, + _reserved_end: [u8; 0x20], } impl TX_SLOT_PARAMETERS { #[doc = "0x00 - PLCP1"] @@ -35,6 +37,11 @@ impl TX_SLOT_PARAMETERS { pub const fn duration(&self) -> &DURATION { &self.duration } + #[doc = "0x18 - "] + #[inline(always)] + pub const fn pmd(&self) -> &PMD { + &self.pmd + } } #[doc = "PLCP1 (rw) register accessor: PLCP1\n\nYou can [`read`](crate::Reg::read) this register and get [`plcp1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`plcp1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@plcp1`] module"] pub type PLCP1 = crate::Reg; @@ -56,3 +63,7 @@ pub mod ht_unknown; pub type DURATION = crate::Reg; #[doc = "duration of the frame exchange"] pub mod duration; +#[doc = "PMD (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`pmd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmd`] module"] +pub type PMD = crate::Reg; +#[doc = ""] +pub mod pmd; diff --git a/esp32/src/wifi/tx_slot_parameters/pmd.rs b/esp32/src/wifi/tx_slot_parameters/pmd.rs new file mode 100644 index 000000000..e1aecad6d --- /dev/null +++ b/esp32/src/wifi/tx_slot_parameters/pmd.rs @@ -0,0 +1,28 @@ +#[doc = "Register `PMD` reader"] +pub type R = crate::R; +#[doc = "Register `PMD` writer"] +pub type W = crate::W; +#[cfg(feature = "impl-register-debug")] +impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } +} +impl W {} +#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`pmd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct PMD_SPEC; +impl crate::RegisterSpec for PMD_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [`pmd::R`](R) reader structure"] +impl crate::Readable for PMD_SPEC {} +#[doc = "`write(|w| ..)` method takes [`pmd::W`](W) writer structure"] +impl crate::Writable for PMD_SPEC { + type Safety = crate::Unsafe; + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} +#[doc = "`reset()` method sets PMD to value 0"] +impl crate::Resettable for PMD_SPEC { + const RESET_VALUE: u32 = 0; +} diff --git a/esp32/svd/patches/esp32-wifi.yaml b/esp32/svd/patches/esp32-wifi.yaml index ab1d9627c..c70b1878f 100644 --- a/esp32/svd/patches/esp32-wifi.yaml +++ b/esp32/svd/patches/esp32-wifi.yaml @@ -12,7 +12,7 @@ _add: size: 32 addressBlock: offset: 0x0 - size: 0x2000 + size: 0x2100 usage: registers registers: @@ -315,6 +315,9 @@ WIFI: description: duration of the frame exchange addressOffset: 0x10 access: read-write + PMD: + addressOffset: 0x18 + access: read-write CRYPTO_KEY_ENTRY%s: dim: 16 dimIncrement: 40 From 546d271307200be7ec74a9b788e88dedf501a042 Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Mon, 16 Dec 2024 16:17:58 +0100 Subject: [PATCH 8/8] Temporarily removed crypto support --- esp32/src/wifi/crypto_key_entry/addr_high.rs | 4 -- esp32/src/wifi/filter_bank.rs | 56 +++++++++++++++---- esp32/src/wifi/filter_bank/addr_high.rs | 1 - esp32/src/wifi/filter_bank/mask_high.rs | 2 - esp32/src/wifi/rx_ctrl.rs | 2 - esp32/src/wifi/tx_complete_clear.rs | 1 - esp32/src/wifi/tx_complete_status.rs | 1 - esp32/src/wifi/tx_error_clear.rs | 2 - esp32/src/wifi/tx_error_status.rs | 2 - esp32/src/wifi/tx_slot_config/plcp0.rs | 2 - .../src/wifi/tx_slot_parameters/ht_unknown.rs | 1 - esp32/src/wifi/tx_slot_parameters/plcp1.rs | 4 -- esp32/src/wifi/tx_slot_parameters/plcp2.rs | 1 - esp32/src/wifi/wifi_int_status.rs | 3 - esp32/svd/patches/esp32-wifi.yaml | 26 --------- 15 files changed, 44 insertions(+), 64 deletions(-) diff --git a/esp32/src/wifi/crypto_key_entry/addr_high.rs b/esp32/src/wifi/crypto_key_entry/addr_high.rs index be45e281d..e5fe437e9 100644 --- a/esp32/src/wifi/crypto_key_entry/addr_high.rs +++ b/esp32/src/wifi/crypto_key_entry/addr_high.rs @@ -54,25 +54,21 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bits 0:15"] #[inline(always)] - #[must_use] pub fn addr(&mut self) -> ADDR_W { ADDR_W::new(self, 0) } #[doc = "Bits 18:20"] #[inline(always)] - #[must_use] pub fn algorithm(&mut self) -> ALGORITHM_W { ALGORITHM_W::new(self, 18) } #[doc = "Bits 24:25"] #[inline(always)] - #[must_use] pub fn interface(&mut self) -> INTERFACE_W { INTERFACE_W::new(self, 24) } #[doc = "Bits 30:31"] #[inline(always)] - #[must_use] pub fn supplicant_key_index(&mut self) -> SUPPLICANT_KEY_INDEX_W { SUPPLICANT_KEY_INDEX_W::new(self, 30) } diff --git a/esp32/src/wifi/filter_bank.rs b/esp32/src/wifi/filter_bank.rs index cac866ef2..72db6cbb9 100644 --- a/esp32/src/wifi/filter_bank.rs +++ b/esp32/src/wifi/filter_bank.rs @@ -17,56 +17,88 @@ impl FILTER_BANK { pub const fn addr_low(&self, n: usize) -> &ADDR_LOW { #[allow(clippy::no_effect)] [(); 2][n]; - unsafe { &*(self as *const Self).cast::().add(0).add(8 * n).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(8 * n).cast() } } #[doc = "Iterator for array of:"] #[doc = "0x00..0x08 - First 4 bytes of BSSID MAC address filter"] #[inline(always)] pub fn addr_low_iter(&self) -> impl Iterator { - (0..2) - .map(move |n| unsafe { &*(self as *const Self).cast::().add(0).add(8 * n).cast() }) + (0..2).map(move |n| unsafe { &*core::ptr::from_ref(self).cast::().add(8 * n).cast() }) } #[doc = "0x04..0x0c - last 2 bytes of BSSID MAC address filter"] #[inline(always)] pub const fn addr_high(&self, n: usize) -> &ADDR_HIGH { #[allow(clippy::no_effect)] [(); 2][n]; - unsafe { &*(self as *const Self).cast::().add(4).add(8 * n).cast() } + unsafe { + &*core::ptr::from_ref(self) + .cast::() + .add(4) + .add(8 * n) + .cast() + } } #[doc = "Iterator for array of:"] #[doc = "0x04..0x0c - last 2 bytes of BSSID MAC address filter"] #[inline(always)] pub fn addr_high_iter(&self) -> impl Iterator { - (0..2) - .map(move |n| unsafe { &*(self as *const Self).cast::().add(4).add(8 * n).cast() }) + (0..2).map(move |n| unsafe { + &*core::ptr::from_ref(self) + .cast::() + .add(4) + .add(8 * n) + .cast() + }) } #[doc = "0x20..0x28 - First 4 bytes of BSSID MAC address filter mask"] #[inline(always)] pub const fn mask_low(&self, n: usize) -> &MASK_LOW { #[allow(clippy::no_effect)] [(); 2][n]; - unsafe { &*(self as *const Self).cast::().add(32).add(8 * n).cast() } + unsafe { + &*core::ptr::from_ref(self) + .cast::() + .add(32) + .add(8 * n) + .cast() + } } #[doc = "Iterator for array of:"] #[doc = "0x20..0x28 - First 4 bytes of BSSID MAC address filter mask"] #[inline(always)] pub fn mask_low_iter(&self) -> impl Iterator { - (0..2) - .map(move |n| unsafe { &*(self as *const Self).cast::().add(32).add(8 * n).cast() }) + (0..2).map(move |n| unsafe { + &*core::ptr::from_ref(self) + .cast::() + .add(32) + .add(8 * n) + .cast() + }) } #[doc = "0x24..0x2c - last 2 bytes of BSSID MAC address filter mask"] #[inline(always)] pub const fn mask_high(&self, n: usize) -> &MASK_HIGH { #[allow(clippy::no_effect)] [(); 2][n]; - unsafe { &*(self as *const Self).cast::().add(36).add(8 * n).cast() } + unsafe { + &*core::ptr::from_ref(self) + .cast::() + .add(36) + .add(8 * n) + .cast() + } } #[doc = "Iterator for array of:"] #[doc = "0x24..0x2c - last 2 bytes of BSSID MAC address filter mask"] #[inline(always)] pub fn mask_high_iter(&self) -> impl Iterator { - (0..2) - .map(move |n| unsafe { &*(self as *const Self).cast::().add(36).add(8 * n).cast() }) + (0..2).map(move |n| unsafe { + &*core::ptr::from_ref(self) + .cast::() + .add(36) + .add(8 * n) + .cast() + }) } } #[doc = "ADDR_LOW (rw) register accessor: First 4 bytes of BSSID MAC address filter\n\nYou can [`read`](crate::Reg::read) this register and get [`addr_low::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr_low::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr_low`] module"] diff --git a/esp32/src/wifi/filter_bank/addr_high.rs b/esp32/src/wifi/filter_bank/addr_high.rs index 10d6bdc9f..519efd8d7 100644 --- a/esp32/src/wifi/filter_bank/addr_high.rs +++ b/esp32/src/wifi/filter_bank/addr_high.rs @@ -24,7 +24,6 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bits 0:15"] #[inline(always)] - #[must_use] pub fn addr(&mut self) -> ADDR_W { ADDR_W::new(self, 0) } diff --git a/esp32/src/wifi/filter_bank/mask_high.rs b/esp32/src/wifi/filter_bank/mask_high.rs index 31ad42247..f35ccfa1a 100644 --- a/esp32/src/wifi/filter_bank/mask_high.rs +++ b/esp32/src/wifi/filter_bank/mask_high.rs @@ -34,13 +34,11 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bits 0:15"] #[inline(always)] - #[must_use] pub fn mask(&mut self) -> MASK_W { MASK_W::new(self, 0) } #[doc = "Bit 16"] #[inline(always)] - #[must_use] pub fn enabled(&mut self) -> ENABLED_W { ENABLED_W::new(self, 16) } diff --git a/esp32/src/wifi/rx_ctrl.rs b/esp32/src/wifi/rx_ctrl.rs index 622ae66ba..299a84e46 100644 --- a/esp32/src/wifi/rx_ctrl.rs +++ b/esp32/src/wifi/rx_ctrl.rs @@ -34,13 +34,11 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bit 0 - Instruct the hardware to reload the RX descriptors"] #[inline(always)] - #[must_use] pub fn rx_descr_reload(&mut self) -> RX_DESCR_RELOAD_W { RX_DESCR_RELOAD_W::new(self, 0) } #[doc = "Bit 31 - Enable frame reception"] #[inline(always)] - #[must_use] pub fn rx_enable(&mut self) -> RX_ENABLE_W { RX_ENABLE_W::new(self, 31) } diff --git a/esp32/src/wifi/tx_complete_clear.rs b/esp32/src/wifi/tx_complete_clear.rs index 4850d6828..b9e394c5b 100644 --- a/esp32/src/wifi/tx_complete_clear.rs +++ b/esp32/src/wifi/tx_complete_clear.rs @@ -24,7 +24,6 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bits 0:4"] #[inline(always)] - #[must_use] pub fn slots(&mut self) -> SLOTS_W { SLOTS_W::new(self, 0) } diff --git a/esp32/src/wifi/tx_complete_status.rs b/esp32/src/wifi/tx_complete_status.rs index e7057471d..9da99f9fa 100644 --- a/esp32/src/wifi/tx_complete_status.rs +++ b/esp32/src/wifi/tx_complete_status.rs @@ -24,7 +24,6 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bits 0:4"] #[inline(always)] - #[must_use] pub fn slots(&mut self) -> SLOTS_W { SLOTS_W::new(self, 0) } diff --git a/esp32/src/wifi/tx_error_clear.rs b/esp32/src/wifi/tx_error_clear.rs index 4ac05c3b1..9bc5c4cc7 100644 --- a/esp32/src/wifi/tx_error_clear.rs +++ b/esp32/src/wifi/tx_error_clear.rs @@ -34,13 +34,11 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bits 0:4"] #[inline(always)] - #[must_use] pub fn slot_collision(&mut self) -> SLOT_COLLISION_W { SLOT_COLLISION_W::new(self, 0) } #[doc = "Bits 16:20"] #[inline(always)] - #[must_use] pub fn slot_timeout(&mut self) -> SLOT_TIMEOUT_W { SLOT_TIMEOUT_W::new(self, 16) } diff --git a/esp32/src/wifi/tx_error_status.rs b/esp32/src/wifi/tx_error_status.rs index 97c942667..3106d1fe4 100644 --- a/esp32/src/wifi/tx_error_status.rs +++ b/esp32/src/wifi/tx_error_status.rs @@ -34,13 +34,11 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bits 0:4"] #[inline(always)] - #[must_use] pub fn slot_collision(&mut self) -> SLOT_COLLISION_W { SLOT_COLLISION_W::new(self, 0) } #[doc = "Bits 16:20"] #[inline(always)] - #[must_use] pub fn slot_timeout(&mut self) -> SLOT_TIMEOUT_W { SLOT_TIMEOUT_W::new(self, 16) } diff --git a/esp32/src/wifi/tx_slot_config/plcp0.rs b/esp32/src/wifi/tx_slot_config/plcp0.rs index 11e8f1bc9..f5e7d1bfc 100644 --- a/esp32/src/wifi/tx_slot_config/plcp0.rs +++ b/esp32/src/wifi/tx_slot_config/plcp0.rs @@ -34,13 +34,11 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bits 0:19 - Bottom bits of address of dma_item"] #[inline(always)] - #[must_use] pub fn dma_addr(&mut self) -> DMA_ADDR_W { DMA_ADDR_W::new(self, 0) } #[doc = "Bits 20:31 - Flags for the SLOT"] #[inline(always)] - #[must_use] pub fn flags(&mut self) -> FLAGS_W { FLAGS_W::new(self, 20) } diff --git a/esp32/src/wifi/tx_slot_parameters/ht_unknown.rs b/esp32/src/wifi/tx_slot_parameters/ht_unknown.rs index 7b5ab8ada..fa76ba6f8 100644 --- a/esp32/src/wifi/tx_slot_parameters/ht_unknown.rs +++ b/esp32/src/wifi/tx_slot_parameters/ht_unknown.rs @@ -24,7 +24,6 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bits 0:19 - The length of the PPDU"] #[inline(always)] - #[must_use] pub fn length(&mut self) -> LENGTH_W { LENGTH_W::new(self, 0) } diff --git a/esp32/src/wifi/tx_slot_parameters/plcp1.rs b/esp32/src/wifi/tx_slot_parameters/plcp1.rs index 426aba18c..5cf2c642f 100644 --- a/esp32/src/wifi/tx_slot_parameters/plcp1.rs +++ b/esp32/src/wifi/tx_slot_parameters/plcp1.rs @@ -54,25 +54,21 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bits 0:11 - Length of packet (in bytes)"] #[inline(always)] - #[must_use] pub fn len(&mut self) -> LEN_W { LEN_W::new(self, 0) } #[doc = "Bits 12:16 - Packet rate (see wifi_phy_rate_t)"] #[inline(always)] - #[must_use] pub fn rate(&mut self) -> RATE_W { RATE_W::new(self, 12) } #[doc = "Bit 25 - Bit indicating if this is 802.11n"] #[inline(always)] - #[must_use] pub fn is_80211_n(&mut self) -> IS_80211_N_W { IS_80211_N_W::new(self, 25) } #[doc = "Bits 28:29 - meaning unknown, set to one for TX"] #[inline(always)] - #[must_use] pub fn unknown_enable(&mut self) -> UNKNOWN_ENABLE_W { UNKNOWN_ENABLE_W::new(self, 28) } diff --git a/esp32/src/wifi/tx_slot_parameters/plcp2.rs b/esp32/src/wifi/tx_slot_parameters/plcp2.rs index b59bc2ab2..96de00ea2 100644 --- a/esp32/src/wifi/tx_slot_parameters/plcp2.rs +++ b/esp32/src/wifi/tx_slot_parameters/plcp2.rs @@ -24,7 +24,6 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bit 5 - meaning unknown, set to one for TX"] #[inline(always)] - #[must_use] pub fn unknown(&mut self) -> UNKNOWN_W { UNKNOWN_W::new(self, 5) } diff --git a/esp32/src/wifi/wifi_int_status.rs b/esp32/src/wifi/wifi_int_status.rs index b06fffa7b..2cabed589 100644 --- a/esp32/src/wifi/wifi_int_status.rs +++ b/esp32/src/wifi/wifi_int_status.rs @@ -44,19 +44,16 @@ impl core::fmt::Debug for R { impl W { #[doc = "Bit 7 - Indicates the completion of a transmission"] #[inline(always)] - #[must_use] pub fn txq_complete(&mut self) -> TXQ_COMPLETE_W { TXQ_COMPLETE_W::new(self, 7) } #[doc = "Bit 8 - Indicates a collision, while transmitting"] #[inline(always)] - #[must_use] pub fn txq_collision(&mut self) -> TXQ_COLLISION_W { TXQ_COLLISION_W::new(self, 8) } #[doc = "Bit 19 - Indicates a timeout, while transmitting"] #[inline(always)] - #[must_use] pub fn txq_timeout(&mut self) -> TXQ_TIMEOUT_W { TXQ_TIMEOUT_W::new(self, 19) } diff --git a/esp32/svd/patches/esp32-wifi.yaml b/esp32/svd/patches/esp32-wifi.yaml index c70b1878f..ed7d208e6 100644 --- a/esp32/svd/patches/esp32-wifi.yaml +++ b/esp32/svd/patches/esp32-wifi.yaml @@ -318,29 +318,3 @@ WIFI: PMD: addressOffset: 0x18 access: read-write - CRYPTO_KEY_ENTRY%s: - dim: 16 - dimIncrement: 40 - addressOffset: 0x1400 - access: read-write - description: The cryptographic keys, to be used by the MAC - registers: - ADDR_LOW: - addressOffset: 0x0 - access: read-write - ADDR_HIGH: - addressOffset: 0x4 - access: read-write - fields: - ADDR: - bitOffset: 0x0 - bitWidth: 0x10 - ALGORITHM: - bitOffset: 0x12 - bitWidth: 0x3 - INTERFACE: - bitOffset: 0x18 - bitWidth: 0x2 - SUPPLICANT_KEY_INDEX: - bitOffset: 0x1e - bitWidth: 0x2