From 7fc95300c64cdcb33db8147e14d74d76e0e9dae6 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Fri, 24 Dec 2021 17:24:16 +1300 Subject: [PATCH 01/34] move feature check into build.rs for correctness previous check would not error if two were selected --- Cargo.toml | 1 + build/build.rs | 50 +++++++++++++++++++++++++++++++++++++++++++++++ build/features.rs | 24 +++++++++++++++++++++++ src/lib.rs | 42 +-------------------------------------- 4 files changed, 76 insertions(+), 41 deletions(-) create mode 100644 build/build.rs create mode 100644 build/features.rs diff --git a/Cargo.toml b/Cargo.toml index 769f5b15..d5eb7b88 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -19,6 +19,7 @@ exclude = [ "docs/*" ] edition = "2018" +build = "build/build.rs" [dependencies] cortex-m = "0.7" diff --git a/build/build.rs b/build/build.rs new file mode 100644 index 00000000..883585cf --- /dev/null +++ b/build/build.rs @@ -0,0 +1,50 @@ +use crate::features::*; + +pub(crate) mod features; + +pub(crate) fn feature_validate() -> bool { + const DEVICE_FEATURES: &[bool] = &[ + IS_FEATURE_ENABLED_L412, + IS_FEATURE_ENABLED_L422, + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, + IS_FEATURE_ENABLED_L471, + IS_FEATURE_ENABLED_L475, + IS_FEATURE_ENABLED_L476, + IS_FEATURE_ENABLED_L486, + IS_FEATURE_ENABLED_L496, + IS_FEATURE_ENABLED_L4A6, + //IS_FEATURE_ENABLED_L4P5, + //IS_FEATURE_ENABLED_L4Q5, + //IS_FEATURE_ENABLED_L4R5, + //IS_FEATURE_ENABLED_L4S5, + //IS_FEATURE_ENABLED_L4R7, + //IS_FEATURE_ENABLED_L4S7, + IS_FEATURE_ENABLED_L4R9, + IS_FEATURE_ENABLED_L4S9, + ]; + DEVICE_FEATURES.iter().filter(|&&b| b).count() == 1 +} + +fn main() { + if !feature_validate() { + panic!( + " +This crate requires exactly one of the following features to be enabled: + stm32l431, stm32l451, stm32l471 + stm32l412, stm32l422, stm32l432, stm32l442, stm32l452, stm32l462 + stm32l433, stm32l443 + stm32l475, + stm32l476, stm32l486, stm32l496, stm32l4a6 + stm32l4r9, stm32l4s9 +" + ); + } +} diff --git a/build/features.rs b/build/features.rs new file mode 100644 index 00000000..5cd74274 --- /dev/null +++ b/build/features.rs @@ -0,0 +1,24 @@ +pub(crate) const IS_FEATURE_ENABLED_L412: bool = cfg!(feature = "stm32l412"); +pub(crate) const IS_FEATURE_ENABLED_L422: bool = cfg!(feature = "stm32l422"); +pub(crate) const IS_FEATURE_ENABLED_L431: bool = cfg!(feature = "stm32l431"); +pub(crate) const IS_FEATURE_ENABLED_L432: bool = cfg!(feature = "stm32l432"); +pub(crate) const IS_FEATURE_ENABLED_L433: bool = cfg!(feature = "stm32l433"); +pub(crate) const IS_FEATURE_ENABLED_L442: bool = cfg!(feature = "stm32l442"); +pub(crate) const IS_FEATURE_ENABLED_L443: bool = cfg!(feature = "stm32l443"); +pub(crate) const IS_FEATURE_ENABLED_L451: bool = cfg!(feature = "stm32l451"); +pub(crate) const IS_FEATURE_ENABLED_L452: bool = cfg!(feature = "stm32l452"); +pub(crate) const IS_FEATURE_ENABLED_L462: bool = cfg!(feature = "stm32l462"); +pub(crate) const IS_FEATURE_ENABLED_L471: bool = cfg!(feature = "stm32l471"); +pub(crate) const IS_FEATURE_ENABLED_L475: bool = cfg!(feature = "stm32l475"); +pub(crate) const IS_FEATURE_ENABLED_L476: bool = cfg!(feature = "stm32l476"); +pub(crate) const IS_FEATURE_ENABLED_L486: bool = cfg!(feature = "stm32l486"); +pub(crate) const IS_FEATURE_ENABLED_L496: bool = cfg!(feature = "stm32l496"); +pub(crate) const IS_FEATURE_ENABLED_L4A6: bool = cfg!(feature = "stm32l4a6"); +pub(crate) const IS_FEATURE_ENABLED_L4P5: bool = cfg!(feature = "stm32l4p5"); +pub(crate) const IS_FEATURE_ENABLED_L4Q5: bool = cfg!(feature = "stm32l4q5"); +pub(crate) const IS_FEATURE_ENABLED_L4R5: bool = cfg!(feature = "stm32l4r5"); +pub(crate) const IS_FEATURE_ENABLED_L4S5: bool = cfg!(feature = "stm32l4s5"); +pub(crate) const IS_FEATURE_ENABLED_L4R7: bool = cfg!(feature = "stm32l4r7"); +pub(crate) const IS_FEATURE_ENABLED_L4S7: bool = cfg!(feature = "stm32l4s7"); +pub(crate) const IS_FEATURE_ENABLED_L4R9: bool = cfg!(feature = "stm32l4r9"); +pub(crate) const IS_FEATURE_ENABLED_L4S9: bool = cfg!(feature = "stm32l4s9"); diff --git a/src/lib.rs b/src/lib.rs index 87ea2daf..4e4a4851 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -10,46 +10,6 @@ #![no_std] -#[cfg(not(any( - feature = "stm32l431", - feature = "stm32l451", - feature = "stm32l471", - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l432", - feature = "stm32l442", - feature = "stm32l452", - feature = "stm32l462", - feature = "stm32l433", - feature = "stm32l443", - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // note L4+ PAC support is mostly missing so other than r9/s9 these features don't actually exist yet - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - // these have PAC support. Hal integration is very slim though - feature = "stm32l4r9", - feature = "stm32l4s9" -)))] -compile_error!( - "\ -This crate requires one of the following features enabled: - stm32l431, stm32l451, stm32l471 - stm32l412, stm32l422, stm32l432, stm32l442, stm32l452, stm32l462 - stm32l433, stm32l443 - stm32l475, - stm32l476, stm32l486, stm32l496, stm32l4a6 - stm32l4r9, stm32l4s9 -" -); - // the common lists of features to spec what a MCU is capable of // lists are split by 3rd digit and 2nd digit groups @@ -62,7 +22,7 @@ This crate requires one of the following features enabled: // L4x5 // any(feature = "stm32l475") // L4x6 -// any(feature = "stm32l476", feature = "stm32l486", feature = "stm32l496", , feature = "stm32l4a6") +// any(feature = "stm32l476", feature = "stm32l486", feature = "stm32l496", feature = "stm32l4a6") // L4+x9 // any(feature = "stm32l4r9", feature = "stm32l4s9") From 3bda3978465961909e6a7b0760867d78894b70f1 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Fri, 24 Dec 2021 17:24:46 +1300 Subject: [PATCH 02/34] import the feature tables from macro branch --- build/build.rs | 1 + build/peripherals.rs | 205 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 206 insertions(+) create mode 100644 build/peripherals.rs diff --git a/build/build.rs b/build/build.rs index 883585cf..70ac9ebd 100644 --- a/build/build.rs +++ b/build/build.rs @@ -1,6 +1,7 @@ use crate::features::*; pub(crate) mod features; +pub(crate) mod peripherals; pub(crate) fn feature_validate() -> bool { const DEVICE_FEATURES: &[bool] = &[ diff --git a/build/peripherals.rs b/build/peripherals.rs new file mode 100644 index 00000000..0bdaf83b --- /dev/null +++ b/build/peripherals.rs @@ -0,0 +1,205 @@ +use crate::features::*; + +const HAS_ADC2: &[bool] = &[ + IS_FEATURE_ENABLED_L412, + IS_FEATURE_ENABLED_L422, + IS_FEATURE_ENABLED_L471, + IS_FEATURE_ENABLED_L475, + IS_FEATURE_ENABLED_L476, + IS_FEATURE_ENABLED_L486, + IS_FEATURE_ENABLED_L496, + IS_FEATURE_ENABLED_L4A6, + IS_FEATURE_ENABLED_L4P5, + IS_FEATURE_ENABLED_L4Q5, + IS_FEATURE_ENABLED_L4R5, + IS_FEATURE_ENABLED_L4S5, + IS_FEATURE_ENABLED_L4R7, + IS_FEATURE_ENABLED_L4S7, + IS_FEATURE_ENABLED_L4R9, + IS_FEATURE_ENABLED_L4S9, +]; + +const HAS_ADC3: &[bool] = &[ + IS_FEATURE_ENABLED_L471, + IS_FEATURE_ENABLED_L475, + IS_FEATURE_ENABLED_L476, + IS_FEATURE_ENABLED_L486, + IS_FEATURE_ENABLED_L496, + IS_FEATURE_ENABLED_L4A6, + IS_FEATURE_ENABLED_L4P5, + IS_FEATURE_ENABLED_L4Q5, + IS_FEATURE_ENABLED_L4R5, + IS_FEATURE_ENABLED_L4S5, + IS_FEATURE_ENABLED_L4R7, + IS_FEATURE_ENABLED_L4S7, + IS_FEATURE_ENABLED_L4R9, + IS_FEATURE_ENABLED_L4S9, +]; + +const HAS_DAC1: &[bool] = &[ + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_COMP1: &[bool] = &[ + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_COMP2: &[bool] = &[ + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_DFSDM1: &[bool] = &[ + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_LCD: &[bool] = &[IS_FEATURE_ENABLED_L433, IS_FEATURE_ENABLED_L443]; + +const HAS_AES: &[bool] = &[ + IS_FEATURE_ENABLED_L422, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_TIM3: &[bool] = &[ + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_TIM7: &[bool] = &[ + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, +]; + +const HAS_I2C2: &[bool] = &[ + IS_FEATURE_ENABLED_L412, + IS_FEATURE_ENABLED_L422, + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_I2C4: &[bool] = &[ + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_USART3: &[bool] = &[ + IS_FEATURE_ENABLED_L412, + IS_FEATURE_ENABLED_L422, + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_UART4: &[bool] = &[ + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_SPI2: &[bool] = &[ + IS_FEATURE_ENABLED_L412, + IS_FEATURE_ENABLED_L422, + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_SPI3: &[bool] = &[ + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_SAI: &[bool] = &[ + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_SWPMI1: &[bool] = &[ + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, +]; + +const HAS_SDMMC: &[bool] = &[ + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_USB_FS: &[bool] = &[ + IS_FEATURE_ENABLED_L412, + IS_FEATURE_ENABLED_L422, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; + +const HAS_CAN1: &[bool] = &[ + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, +]; From 74afb53678408dc537412080d786e05ac593d79b Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Fri, 24 Dec 2021 17:52:54 +1300 Subject: [PATCH 03/34] feature gate struct allows this to be a simple check->print loop --- build/build.rs | 13 +- build/peripherals.rs | 411 ++++++++++++++++++++++--------------------- 2 files changed, 219 insertions(+), 205 deletions(-) diff --git a/build/build.rs b/build/build.rs index 70ac9ebd..61dff572 100644 --- a/build/build.rs +++ b/build/build.rs @@ -3,7 +3,7 @@ use crate::features::*; pub(crate) mod features; pub(crate) mod peripherals; -pub(crate) fn feature_validate() -> bool { +fn feature_validate() -> bool { const DEVICE_FEATURES: &[bool] = &[ IS_FEATURE_ENABLED_L412, IS_FEATURE_ENABLED_L422, @@ -48,4 +48,15 @@ This crate requires exactly one of the following features to be enabled: " ); } + + for gate in peripherals::PERIPHERAL_FEATURES { + if gate.state { + println!(r#"cargo:rustc-cfg=condition="peripheral_{}""#, gate.name); + } + } +} + +pub(crate) struct FeatureGate<'a> { + pub name: &'a str, + pub state: bool, } diff --git a/build/peripherals.rs b/build/peripherals.rs index 0bdaf83b..4af8137f 100644 --- a/build/peripherals.rs +++ b/build/peripherals.rs @@ -1,205 +1,208 @@ -use crate::features::*; - -const HAS_ADC2: &[bool] = &[ - IS_FEATURE_ENABLED_L412, - IS_FEATURE_ENABLED_L422, - IS_FEATURE_ENABLED_L471, - IS_FEATURE_ENABLED_L475, - IS_FEATURE_ENABLED_L476, - IS_FEATURE_ENABLED_L486, - IS_FEATURE_ENABLED_L496, - IS_FEATURE_ENABLED_L4A6, - IS_FEATURE_ENABLED_L4P5, - IS_FEATURE_ENABLED_L4Q5, - IS_FEATURE_ENABLED_L4R5, - IS_FEATURE_ENABLED_L4S5, - IS_FEATURE_ENABLED_L4R7, - IS_FEATURE_ENABLED_L4S7, - IS_FEATURE_ENABLED_L4R9, - IS_FEATURE_ENABLED_L4S9, -]; - -const HAS_ADC3: &[bool] = &[ - IS_FEATURE_ENABLED_L471, - IS_FEATURE_ENABLED_L475, - IS_FEATURE_ENABLED_L476, - IS_FEATURE_ENABLED_L486, - IS_FEATURE_ENABLED_L496, - IS_FEATURE_ENABLED_L4A6, - IS_FEATURE_ENABLED_L4P5, - IS_FEATURE_ENABLED_L4Q5, - IS_FEATURE_ENABLED_L4R5, - IS_FEATURE_ENABLED_L4S5, - IS_FEATURE_ENABLED_L4R7, - IS_FEATURE_ENABLED_L4S7, - IS_FEATURE_ENABLED_L4R9, - IS_FEATURE_ENABLED_L4S9, -]; - -const HAS_DAC1: &[bool] = &[ - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L432, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_COMP1: &[bool] = &[ - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L432, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_COMP2: &[bool] = &[ - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L432, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_DFSDM1: &[bool] = &[ - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_LCD: &[bool] = &[IS_FEATURE_ENABLED_L433, IS_FEATURE_ENABLED_L443]; - -const HAS_AES: &[bool] = &[ - IS_FEATURE_ENABLED_L422, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_TIM3: &[bool] = &[ - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_TIM7: &[bool] = &[ - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L432, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, -]; - -const HAS_I2C2: &[bool] = &[ - IS_FEATURE_ENABLED_L412, - IS_FEATURE_ENABLED_L422, - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_I2C4: &[bool] = &[ - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_USART3: &[bool] = &[ - IS_FEATURE_ENABLED_L412, - IS_FEATURE_ENABLED_L422, - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_UART4: &[bool] = &[ - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_SPI2: &[bool] = &[ - IS_FEATURE_ENABLED_L412, - IS_FEATURE_ENABLED_L422, - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_SPI3: &[bool] = &[ - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L432, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_SAI: &[bool] = &[ - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L432, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_SWPMI1: &[bool] = &[ - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L432, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, -]; - -const HAS_SDMMC: &[bool] = &[ - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_USB_FS: &[bool] = &[ - IS_FEATURE_ENABLED_L412, - IS_FEATURE_ENABLED_L422, - IS_FEATURE_ENABLED_L432, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, -]; - -const HAS_CAN1: &[bool] = &[ - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L432, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, +use crate::{features::*, FeatureGate}; + +/// list of peripherals to be gated and whether they are present for the selected features +/// they can then be checked in the library using +/// +/// ```Rust +/// #[cfg(condition = peripheral_)] +/// ``` +pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ + FeatureGate { + name: "adc2", + state: IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "adc3", + state: IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "dac1", + state: IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "comp1", + state: IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "comp2", + state: IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "dfsdm1", + state: IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "lcd", + state: IS_FEATURE_ENABLED_L433 || IS_FEATURE_ENABLED_L443, + }, + FeatureGate { + name: "aes", + state: IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "tim3", + state: IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "tim7", + state: IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L443, + }, + FeatureGate { + name: "i2c2", + state: IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "i2c4", + state: IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "usart3", + state: IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "uart4", + state: IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "spi2", + state: IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "spi3", + state: IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "sai", + state: IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "swpmi1", + state: IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L443, + }, + FeatureGate { + name: "sdmmc", + state: IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "usb_fs", + state: IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "can1", + state: IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, ]; From 3f67d2a7240b3b6d6be990fc8cdcb767ca299646 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Fri, 24 Dec 2021 18:29:03 +1300 Subject: [PATCH 04/34] add L485 which shows up in the ST HAL --- Cargo.toml | 1 + build/build.rs | 1 + build/features.rs | 1 + 3 files changed, 3 insertions(+) diff --git a/Cargo.toml b/Cargo.toml index d5eb7b88..3485602f 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -86,6 +86,7 @@ stm32l443 = [ "stm32l4/stm32l4x3" ] # L4x5 stm32l475 = [ "stm32l4/stm32l4x5" ] +stm32l485 = [ "stm32l4/stm32l4x5" ] # L4x6 stm32l476 = [ "stm32l4/stm32l4x6" ] diff --git a/build/build.rs b/build/build.rs index 61dff572..4b79d8c2 100644 --- a/build/build.rs +++ b/build/build.rs @@ -19,6 +19,7 @@ fn feature_validate() -> bool { IS_FEATURE_ENABLED_L471, IS_FEATURE_ENABLED_L475, IS_FEATURE_ENABLED_L476, + IS_FEATURE_ENABLED_L485, IS_FEATURE_ENABLED_L486, IS_FEATURE_ENABLED_L496, IS_FEATURE_ENABLED_L4A6, diff --git a/build/features.rs b/build/features.rs index 5cd74274..3934ce5b 100644 --- a/build/features.rs +++ b/build/features.rs @@ -11,6 +11,7 @@ pub(crate) const IS_FEATURE_ENABLED_L462: bool = cfg!(feature = "stm32l462"); pub(crate) const IS_FEATURE_ENABLED_L471: bool = cfg!(feature = "stm32l471"); pub(crate) const IS_FEATURE_ENABLED_L475: bool = cfg!(feature = "stm32l475"); pub(crate) const IS_FEATURE_ENABLED_L476: bool = cfg!(feature = "stm32l476"); +pub(crate) const IS_FEATURE_ENABLED_L485: bool = cfg!(feature = "stm32l485"); pub(crate) const IS_FEATURE_ENABLED_L486: bool = cfg!(feature = "stm32l486"); pub(crate) const IS_FEATURE_ENABLED_L496: bool = cfg!(feature = "stm32l496"); pub(crate) const IS_FEATURE_ENABLED_L4A6: bool = cfg!(feature = "stm32l4a6"); From c4299b429eaeab3ae158fdc350b53962228195b7 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Fri, 24 Dec 2021 18:30:01 +1300 Subject: [PATCH 05/34] update peripheral feature tables based on L4 cube package v1.17.1 --- build/peripherals.rs | 286 +++++++++++++++++++++++++++++++------------ 1 file changed, 210 insertions(+), 76 deletions(-) diff --git a/build/peripherals.rs b/build/peripherals.rs index 4af8137f..9a83fe56 100644 --- a/build/peripherals.rs +++ b/build/peripherals.rs @@ -14,34 +14,22 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L471 || IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 || IS_FEATURE_ENABLED_L486 || IS_FEATURE_ENABLED_L496 || IS_FEATURE_ENABLED_L4A6 || IS_FEATURE_ENABLED_L4P5 - || IS_FEATURE_ENABLED_L4Q5 - || IS_FEATURE_ENABLED_L4R5 - || IS_FEATURE_ENABLED_L4S5 - || IS_FEATURE_ENABLED_L4R7 - || IS_FEATURE_ENABLED_L4S7 - || IS_FEATURE_ENABLED_L4R9 - || IS_FEATURE_ENABLED_L4S9, + || IS_FEATURE_ENABLED_L4Q5, }, FeatureGate { name: "adc3", state: IS_FEATURE_ENABLED_L471 || IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 || IS_FEATURE_ENABLED_L486 || IS_FEATURE_ENABLED_L496 - || IS_FEATURE_ENABLED_L4A6 - || IS_FEATURE_ENABLED_L4P5 - || IS_FEATURE_ENABLED_L4Q5 - || IS_FEATURE_ENABLED_L4R5 - || IS_FEATURE_ENABLED_L4S5 - || IS_FEATURE_ENABLED_L4R7 - || IS_FEATURE_ENABLED_L4S7 - || IS_FEATURE_ENABLED_L4R9 - || IS_FEATURE_ENABLED_L4S9, + || IS_FEATURE_ENABLED_L4A6, }, FeatureGate { name: "dac1", @@ -52,18 +40,50 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L443 || IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462, + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { name: "comp1", - state: IS_FEATURE_ENABLED_L431 + state: IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L431 || IS_FEATURE_ENABLED_L432 || IS_FEATURE_ENABLED_L433 || IS_FEATURE_ENABLED_L442 || IS_FEATURE_ENABLED_L443 || IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462, + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { name: "comp2", @@ -74,26 +94,87 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L443 || IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462, + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { name: "dfsdm1", - state: IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462, + state: IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { name: "lcd", - state: IS_FEATURE_ENABLED_L433 || IS_FEATURE_ENABLED_L443, + state: IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6, }, FeatureGate { name: "aes", state: IS_FEATURE_ENABLED_L422 || IS_FEATURE_ENABLED_L442 || IS_FEATURE_ENABLED_L443 - || IS_FEATURE_ENABLED_L462, + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { name: "tim3", - state: IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462, + state: IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { name: "tim7", @@ -112,59 +193,97 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L443 || IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462, + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "i2c2", + state: !(IS_FEATURE_ENABLED_L432 || IS_FEATURE_ENABLED_L442), }, FeatureGate { name: "i2c4", - state: IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462, + state: IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { name: "usart3", - state: IS_FEATURE_ENABLED_L412 - || IS_FEATURE_ENABLED_L422 - || IS_FEATURE_ENABLED_L431 - || IS_FEATURE_ENABLED_L433 - || IS_FEATURE_ENABLED_L443 - || IS_FEATURE_ENABLED_L451 - || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462, + state: !(IS_FEATURE_ENABLED_L432 || IS_FEATURE_ENABLED_L442), }, FeatureGate { name: "uart4", - state: IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462, + state: IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "uart5", + state: IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { name: "spi2", - state: IS_FEATURE_ENABLED_L412 - || IS_FEATURE_ENABLED_L422 - || IS_FEATURE_ENABLED_L431 - || IS_FEATURE_ENABLED_L433 - || IS_FEATURE_ENABLED_L443 - || IS_FEATURE_ENABLED_L451 - || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462, + state: !(IS_FEATURE_ENABLED_L432 || IS_FEATURE_ENABLED_L442), }, FeatureGate { name: "spi3", - state: IS_FEATURE_ENABLED_L431 - || IS_FEATURE_ENABLED_L432 - || IS_FEATURE_ENABLED_L433 - || IS_FEATURE_ENABLED_L442 - || IS_FEATURE_ENABLED_L443 - || IS_FEATURE_ENABLED_L451 - || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462, + state: !(IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422), }, FeatureGate { - name: "sai", - state: IS_FEATURE_ENABLED_L431 - || IS_FEATURE_ENABLED_L432 - || IS_FEATURE_ENABLED_L433 - || IS_FEATURE_ENABLED_L442 - || IS_FEATURE_ENABLED_L443 - || IS_FEATURE_ENABLED_L451 - || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462, + name: "sai1", + state: !(IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422), }, FeatureGate { name: "swpmi1", @@ -172,19 +291,24 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L432 || IS_FEATURE_ENABLED_L433 || IS_FEATURE_ENABLED_L442 - || IS_FEATURE_ENABLED_L443, + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6, }, FeatureGate { name: "sdmmc", - state: IS_FEATURE_ENABLED_L431 - || IS_FEATURE_ENABLED_L433 - || IS_FEATURE_ENABLED_L443 - || IS_FEATURE_ENABLED_L451 - || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462, + state: !(IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L442), }, FeatureGate { - name: "usb_fs", + name: "usb_device_fs", state: IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422 || IS_FEATURE_ENABLED_L432 @@ -194,15 +318,25 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462, }, + FeatureGate { + name: "usb_otg_fs", + state: IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, FeatureGate { name: "can1", - state: IS_FEATURE_ENABLED_L431 - || IS_FEATURE_ENABLED_L432 - || IS_FEATURE_ENABLED_L433 - || IS_FEATURE_ENABLED_L442 - || IS_FEATURE_ENABLED_L443 - || IS_FEATURE_ENABLED_L451 - || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462, + state: !(IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422), }, ]; From f568cf6ef13e613354abe2f385dc3ad7900b228b Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Fri, 24 Dec 2021 18:38:27 +1300 Subject: [PATCH 06/34] update serial gates --- src/serial.rs | 101 +++----------------------------------------------- 1 file changed, 6 insertions(+), 95 deletions(-) diff --git a/src/serial.rs b/src/serial.rs index 9a3dc692..68a6eef4 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -21,26 +21,7 @@ use crate::pac; use crate::rcc::{Clocks, Enable, RccBus, Reset}; use crate::time::{Bps, U32Ext}; -#[cfg(any( - //feature = "stm32l451", // missing PAC support - // feature = "stm32l452", // missing PAC support - // feature = "stm32l462", // missing PAC support - // feature = "stm32l471", // missing PAC support - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(any(condition = "peripheral_uart4", condition = "peripheral_uart5",))] use crate::dma::dma2; /// Interrupt event @@ -845,52 +826,17 @@ hal! { USART2: (usart2, pclk1, tx: (TxDma2, c7s, dma1::C7), rx: (RxDma2, c6s, dma1::C6)), } -#[cfg(not(any(feature = "stm32l432", feature = "stm32l442")))] +#[cfg(condition = "peripheral_usart3")] hal! { USART3: (usart3, pclk1, tx: (TxDma3, c2s, dma1::C2), rx: (RxDma3, c3s, dma1::C3)), } -#[cfg(any( - // feature = "stm32l451", // missing PAC support - // feature = "stm32l452", // missing PAC support - // feature = "stm32l462", // missing PAC support - // feature = "stm32l471", // missing PAC support - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_uart4")] hal! { UART4: (uart4, pclk1, tx: (TxDma4, c3s, dma2::C3), rx: (RxDma4, c5s, dma2::C5)), } -#[cfg(any( - // feature = "stm32l471", // missing PAC support - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_uart5")] hal! { UART5: (uart5, pclk1, tx: (TxDma5, c1s, dma2::C1), rx: (RxDma5, c2s, dma2::C2)), } @@ -1027,26 +973,7 @@ impl_pin_traits! { } } -#[cfg(any( - // feature = "stm32l451", - // feature = "stm32l452", - // feature = "stm32l462", - // feature = "stm32l471", - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_uart4")] impl_pin_traits! { UART4: { 8: { @@ -1058,23 +985,7 @@ impl_pin_traits! { } } -#[cfg(any( - // feature = "stm32l471", ,, missing PAC support - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_uart5")] impl_pin_traits! { UART5: { 8: { From 802d688a37bfab7b73798d52275b6f52b5e8a35c Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Fri, 24 Dec 2021 18:40:55 +1300 Subject: [PATCH 07/34] PAC support for UART4/5 is not great --- build/peripherals.rs | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/build/peripherals.rs b/build/peripherals.rs index 9a83fe56..70d0bfc2 100644 --- a/build/peripherals.rs +++ b/build/peripherals.rs @@ -236,11 +236,11 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ }, FeatureGate { name: "uart4", - state: IS_FEATURE_ENABLED_L451 - || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462 - || IS_FEATURE_ENABLED_L471 - || IS_FEATURE_ENABLED_L475 + state: //IS_FEATURE_ENABLED_L451 -- missing PAC support + //|| IS_FEATURE_ENABLED_L452 -- missing PAC support + //|| IS_FEATURE_ENABLED_L462 -- missing PAC support + //|| IS_FEATURE_ENABLED_L471 -- missing PAC support + IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 || IS_FEATURE_ENABLED_L485 || IS_FEATURE_ENABLED_L486 @@ -257,8 +257,8 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ }, FeatureGate { name: "uart5", - state: IS_FEATURE_ENABLED_L471 - || IS_FEATURE_ENABLED_L475 + state: //IS_FEATURE_ENABLED_L471 -- missing PAC support + IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 || IS_FEATURE_ENABLED_L485 || IS_FEATURE_ENABLED_L486 From a2571d0b1c8ca08245bf481e19740e837139e59f Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Fri, 24 Dec 2021 18:43:34 +1300 Subject: [PATCH 08/34] add RTC type3 gate --- build/peripherals.rs | 7 +++++++ src/rtc.rs | 28 ++++------------------------ 2 files changed, 11 insertions(+), 24 deletions(-) diff --git a/build/peripherals.rs b/build/peripherals.rs index 70d0bfc2..fd6c0a41 100644 --- a/build/peripherals.rs +++ b/build/peripherals.rs @@ -339,4 +339,11 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ name: "can1", state: !(IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422), }, + FeatureGate { + name: "rtc_type3", + state: IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5, + }, ]; diff --git a/src/rtc.rs b/src/rtc.rs index 03492bfc..29a1d319 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -1,35 +1,15 @@ //! RTC peripheral abstraction /// refer to AN4759 to compare features of RTC2 and RTC3 -#[cfg(not(any( - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l4p5", - feature = "stm32l4q5" -)))] +#[cfg(not(condition = "peripheral_rtc_type3"))] pub mod rtc2; -#[cfg(not(any( - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l4p5", - feature = "stm32l4q5" -)))] +#[cfg(not(condition = "peripheral_rtc_type3"))] pub use rtc2 as rtc_registers; /// refer to AN4759 to compare features of RTC2 and RTC3 -#[cfg(any( - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l4p5", - feature = "stm32l4q5" -))] +#[cfg(condition = "peripheral_rtc_type3")] pub mod rtc3; -#[cfg(any( - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l4p5", - feature = "stm32l4q5" -))] +#[cfg(condition = "peripheral_rtc_type3")] pub use rtc3 as rtc_registers; use void::Void; From f8296c0805477db0a5ffc5cc86083118f775b6be Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Fri, 24 Dec 2021 18:55:51 +1300 Subject: [PATCH 09/34] add gates for device family (L4xx groups) --- build/build.rs | 6 ++++ build/family.rs | 83 +++++++++++++++++++++++++++++++++++++++++++++++++ src/qspi.rs | 36 ++++++++++++--------- 3 files changed, 111 insertions(+), 14 deletions(-) create mode 100644 build/family.rs diff --git a/build/build.rs b/build/build.rs index 4b79d8c2..b25b2944 100644 --- a/build/build.rs +++ b/build/build.rs @@ -1,5 +1,6 @@ use crate::features::*; +pub(crate) mod family; pub(crate) mod features; pub(crate) mod peripherals; @@ -55,6 +56,11 @@ This crate requires exactly one of the following features to be enabled: println!(r#"cargo:rustc-cfg=condition="peripheral_{}""#, gate.name); } } + for gate in family::DEVICE_FAMILY { + if gate.state { + println!(r#"cargo:rustc-cfg=condition="family_{}""#, gate.name); + } + } } pub(crate) struct FeatureGate<'a> { diff --git a/build/family.rs b/build/family.rs new file mode 100644 index 00000000..e845f261 --- /dev/null +++ b/build/family.rs @@ -0,0 +1,83 @@ +use crate::{features::*, FeatureGate}; + +/// list of peripherals to be gated and whether they are present for the selected features +/// they can then be checked in the library using +/// +/// ```Rust +/// #[cfg(condition = peripheral_)] +/// ``` +pub(crate) const DEVICE_FAMILY: &[FeatureGate] = &[ + FeatureGate { + name: "L4x1", + state: IS_FEATURE_ENABLED_L431 || IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L471, + }, + FeatureGate { + name: "L4x2", + state: IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462, + }, + FeatureGate { + name: "L4x3", + state: IS_FEATURE_ENABLED_L433 || IS_FEATURE_ENABLED_L443, + }, + FeatureGate { + name: "L4x5", + state: IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L485, + }, + FeatureGate { + name: "L4x6", + state: IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6, + }, + FeatureGate { + name: "L4+x5", + state: IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5, + }, + FeatureGate { + name: "L4+x7", + state: IS_FEATURE_ENABLED_L4S7 || IS_FEATURE_ENABLED_L4R7, + }, + FeatureGate { + name: "L4+x9", + state: IS_FEATURE_ENABLED_L4S9 || IS_FEATURE_ENABLED_L4R9, + }, + FeatureGate { + name: "L41_42", + state: IS_FEATURE_ENABLED_L433 || IS_FEATURE_ENABLED_L443, + }, + FeatureGate { + name: "L43_44", + state: IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L485, + }, + FeatureGate { + name: "L45_46", + state: IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6, + }, + FeatureGate { + name: "L47_48", + state: IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5, + }, + FeatureGate { + name: "L4P_4Q", + state: IS_FEATURE_ENABLED_L4S7 || IS_FEATURE_ENABLED_L4R7, + }, + FeatureGate { + name: "L4R_4S", + state: IS_FEATURE_ENABLED_L4S9 || IS_FEATURE_ENABLED_L4R9, + }, +]; diff --git a/src/qspi.rs b/src/qspi.rs index 5a6bea0a..5459152a 100644 --- a/src/qspi.rs +++ b/src/qspi.rs @@ -6,18 +6,16 @@ use crate::gpio::{ gpioe::{PE10, PE11, PE12, PE13, PE14, PE15}, }; -#[cfg(not(any(feature = "stm32l475")))] +#[cfg(not(condition = "family_L4x5"))] use crate::gpio::{ gpioa::{PA2, PA3}, gpiod::{PD3, PD4, PD5, PD6, PD7}, }; -#[cfg(any( - feature = "stm32l476", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6" -))] +#[cfg(condition = "family_L4x2")] +use crate::gpio::gpiob::PB2; + +#[cfg(condition = "family_L4x6")] use crate::gpio::{ gpioc::{PC1, PC2, PC4, PC5}, gpiof::{PF6, PF7, PF8, PF9}, @@ -708,7 +706,7 @@ pins!( IO3: [PE15, PA6] ); -#[cfg(not(any(feature = "stm32l475")))] +#[cfg(not(condition = "family_L4x5"))] pins!( QUADSPI, 10, @@ -720,12 +718,22 @@ pins!( IO3: [PD7] ); -#[cfg(any( - feature = "stm32l476", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6" -))] +#[cfg(condition = "family_L4x2")] +impl IO0Pin for PB1> { + fn set_speed(self, speed: Speed) -> Self { + self.set_speed(speed) + } +} +#[cfg(condition = "family_L4x2")] +impl private::Sealed for PB2> {} +#[cfg(condition = "family_L4x2")] +impl IO1Pin for PB2> { + fn set_speed(self, speed: Speed) -> Self { + self.set_speed(speed) + } +} + +#[cfg(condition = "family_L4x6")] pins!( QUADSPI, 10, From be416c3bb1e5d398effbed91e85c2138cab93482 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Fri, 24 Dec 2021 19:10:02 +1300 Subject: [PATCH 10/34] update i2c gates --- src/i2c.rs | 116 ++++++++++++++++++++++------------------------------- 1 file changed, 47 insertions(+), 69 deletions(-) diff --git a/src/i2c.rs b/src/i2c.rs index 2d7ca97a..dcfd1893 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -4,23 +4,12 @@ use crate::hal::blocking::i2c::{Read, Write, WriteRead}; -#[cfg(any( - feature = "stm32l451", - feature = "stm32l452", - feature = "stm32l462", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_i2c2")] +use crate::pac::I2C2; +#[cfg(condition = "peripheral_i2c4")] use crate::pac::I2C4; -use crate::pac::{i2c1, I2C1, I2C2, I2C3}; + +use crate::pac::{i2c1, I2C1, I2C3}; use crate::rcc::{Clocks, Enable, RccBus, Reset}; use crate::time::Hertz; @@ -197,24 +186,11 @@ macro_rules! hal { } hal!(I2C1, i2c1); +#[cfg(condition = "peripheral_i2c2")] hal!(I2C2, i2c2); hal!(I2C3, i2c3); -#[cfg(any( - feature = "stm32l451", - feature = "stm32l452", - feature = "stm32l462", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_i2c4")] hal!(I2C4, i2c4); impl I2c @@ -467,11 +443,13 @@ where } } -#[cfg(any(feature = "stm32l431", feature = "stm32l451", feature = "stm32l471"))] +#[cfg(condition = "family_L4x1")] mod stm32l4x1_pins { - #[cfg(any(feature = "stm32l451"))] + #[cfg(condition = "peripheral_i2c2")] + use super::I2C2; + #[cfg(condition = "peripheral_i2c4")] use super::I2C4; - use super::{I2C1, I2C2, I2C3}; + use super::{I2C1, I2C3}; use crate::gpio::*; #[cfg(not(feature = "stm32l471"))] use gpioa::{PA10, PA7, PA9}; @@ -484,31 +462,26 @@ mod stm32l4x1_pins { #[cfg(not(feature = "stm32l471"))] pins!(I2C1, 4, SCL: [PA9], SDA: [PA10]); - + #[cfg(condition = "peripheral_i2c2")] pins!(I2C2, 4, SCL: [PB10, PB13], SDA: [PB11, PB14]); pins!(I2C3, 4, SCL: [PC0], SDA: [PC1]); #[cfg(not(feature = "stm32l471"))] pins!(I2C3, 4, SCL: [PA7], SDA: [PB4]); - #[cfg(not(any(feature = "stm32l431", feature = "stm32l471")))] + #[cfg(condition = "peripheral_i2c4")] + use gpiod::{PD12, PD13}; + #[cfg(condition = "peripheral_i2c4")] pins!(I2C4, 4, SCL: [PD12], SDA: [PD13]); - #[cfg(not(any(feature = "stm32l431", feature = "stm32l471")))] + #[cfg(condition = "peripheral_i2c4")] pins!(I2C4, 3, SCL: [PB10], SDA: [PB11]); } -#[cfg(any( - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l432", - feature = "stm32l442", - feature = "stm32l452", - feature = "stm32l462" -))] +#[cfg(condition = "family_L4x2")] mod stm32l4x2_pins { - #[cfg(not(any(feature = "stm32l432", feature = "stm32l442")))] + #[cfg(condition = "peripheral_i2c2")] use super::I2C2; - #[cfg(any(feature = "stm32l452", feature = "stm32l462"))] + #[cfg(condition = "peripheral_i2c4")] use super::I2C4; use super::{I2C1, I2C3}; use crate::gpio::*; @@ -523,24 +496,26 @@ mod stm32l4x2_pins { #[cfg(not(any(feature = "stm32l432", feature = "stm32l442")))] pins!(I2C1, 4, SCL: [PB8], SDA: [PB9]); - #[cfg(not(any(feature = "stm32l432", feature = "stm32l442")))] + #[cfg(condition = "peripheral_i2c2")] pins!(I2C2, 4, SCL: [PB10, PB13], SDA: [PB11, PB14]); pins!(I2C3, 4, SCL: [PA7], SDA: [PB4]); #[cfg(not(any(feature = "stm32l432", feature = "stm32l442")))] pins!(I2C3, 4, SCL: [PC0], SDA: [PC1]); - #[cfg(any(feature = "stm32l452", feature = "stm32l462"))] + #[cfg(condition = "peripheral_i2c4")] pins!(I2C4, 2, SCL: [PC0], SDA: [PC1]); - #[cfg(any(feature = "stm32l452", feature = "stm32l462"))] + #[cfg(condition = "peripheral_i2c4")] pins!(I2C4, 3, SCL: [PB10], SDA: [PB11]); - #[cfg(any(feature = "stm32l452", feature = "stm32l462"))] + #[cfg(condition = "peripheral_i2c4")] pins!(I2C4, 4, SCL: [PD12], SDA: [PD13]); } -#[cfg(any(feature = "stm32l433", feature = "stm32l443"))] +#[cfg(condition = "family_L4x3")] mod stm32l4x3_pins { - use super::{I2C1, I2C2, I2C3}; + #[cfg(condition = "peripheral_i2c2")] + use super::I2C2; + use super::{I2C1, I2C3}; use crate::gpio::*; use gpioa::{PA10, PA7, PA9}; use gpiob::{PB10, PB11, PB13, PB14, PB4, PB6, PB7, PB8, PB9}; @@ -548,35 +523,35 @@ mod stm32l4x3_pins { pins!(I2C1, 4, SCL: [PA9, PB6, PB8], SDA: [PA10, PB7, PB9]); + #[cfg(condition = "peripheral_i2c2")] pins!(I2C2, 4, SCL: [PB10, PB13], SDA: [PB11, PB14]); pins!(I2C3, 4, SCL: [PA7, PC0], SDA: [PB4, PC1]); } -#[cfg(any(feature = "stm32l475"))] +#[cfg(condition = "family_L4x5")] mod stm32l4x5_pins { - use super::{I2C1, I2C2, I2C3}; + #[cfg(condition = "peripheral_i2c2")] + use super::I2C2; + use super::{I2C1, I2C3}; use crate::gpio::*; use gpiob::{PB10, PB11, PB13, PB14, PB6, PB7, PB8, PB9}; use gpioc::{PC0, PC1}; pins!(I2C1, 4, SCL: [PB6, PB8], SDA: [PB7, PB9]); - + #[cfg(condition = "peripheral_i2c2")] pins!(I2C2, 4, SCL: [PB10, PB13], SDA: [PB11, PB14]); pins!(I2C3, 4, SCL: [PC0], SDA: [PC1]); } -#[cfg(any( - feature = "stm32l476", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6" -))] +#[cfg(condition = "family_L4x6")] mod stm32l4x6_pins { - #[cfg(any(feature = "stm32l496", feature = "stm32l4a6"))] + #[cfg(condition = "peripheral_i2c2")] + use super::I2C2; + #[cfg(condition = "peripheral_i2c4")] use super::I2C4; - use super::{I2C1, I2C2, I2C3}; + use super::{I2C1, I2C3}; use crate::gpio::*; #[cfg(any(feature = "stm32l496", feature = "stm32l4a6"))] use gpioa::PA7; @@ -584,28 +559,31 @@ mod stm32l4x6_pins { use gpiob::PB4; use gpiob::{PB10, PB11, PB13, PB14, PB6, PB7, PB8, PB9}; use gpioc::{PC0, PC1}; - #[cfg(any(feature = "stm32l496", feature = "stm32l4a6"))] + #[cfg(condition = "peripheral_i2c4")] use gpiod::{PD12, PD13}; use gpiof::{PF0, PF1}; - #[cfg(any(feature = "stm32l496", feature = "stm32l4a6"))] + #[cfg(condition = "peripheral_i2c4")] use gpiof::{PF14, PF15}; use gpiog::{PG13, PG14, PG7, PG8}; pins!(I2C1, 4, SCL: [PB6, PB8], SDA: [PB7, PB9]); - + #[cfg(condition = "peripheral_i2c2")] pins!(I2C2, 4, SCL: [PB10, PB13, PF1], SDA: [PB11, PB14, PF0]); pins!(I2C3, 4, SCL: [PC0, PG7, PG14], SDA: [PC1, PG8, PG13]); #[cfg(any(feature = "stm32l496", feature = "stm32l4a6"))] pins!(I2C3, 4, SCL: [PA7], SDA: [PB4]); - #[cfg(any(feature = "stm32l496", feature = "stm32l4a6"))] + #[cfg(condition = "peripheral_i2c4")] pins!(I2C4, 4, SCL: [PD12, PF14], SDA: [PD13, PF15]); // These are present on STM32L496XX and STM32L4A6xG, but the // PAC does not have gpioh, so we can't actually these pins // Both not on STM32L486XX and STM32L476XX - // use gpioh::{PH4, PH5, PH7, PH8}; + // #[cfg(condition = "peripheral_i2c2")] + // use gpioh::{PH4, PH5}; + // #[cfg(condition = "peripheral_i2c2")] // pins!(I2C2, AF4, SCL: [PH4], SDA: [PH5]); + // use gpioh::{PH7, PH8}; // pins!(I2C3, AF4, SCL: [PH7], SDA: [PH8]); } From 1ae4871b84a825e38f30f5f14fc8dc5e682d7039 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 08:53:47 +1300 Subject: [PATCH 11/34] gpio f/g --- build/peripherals.rs | 36 ++++++++++++++++++++++++++++++++++++ src/gpio.rs | 36 ++---------------------------------- 2 files changed, 38 insertions(+), 34 deletions(-) diff --git a/build/peripherals.rs b/build/peripherals.rs index fd6c0a41..695bca14 100644 --- a/build/peripherals.rs +++ b/build/peripherals.rs @@ -346,4 +346,40 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4P5 || IS_FEATURE_ENABLED_L4Q5, }, + FeatureGate { + name: "gpiog", + state: //IS_FEATURE_ENABLED_L471 -- missing PAC support + IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "gpiof", + state: //IS_FEATURE_ENABLED_L471 -- missing PAC support + IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, ]; diff --git a/src/gpio.rs b/src/gpio.rs index e560357e..5515d5eb 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -701,23 +701,7 @@ gpio!(GPIOE, gpioe, PEx, 'E', 4, [ PE15: (pe15, 15, Analog, H8, exticr4), ]); -#[cfg(any( - // feature = "stm32l471", // missing PAC support for Port G - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_gpiof")] gpio!(GPIOF, gpiof, PFx, 'F', 5, [ PF0: (pf0, 0, Analog, L8, exticr1), PF1: (pf1, 1, Analog, L8, exticr1), @@ -736,23 +720,7 @@ gpio!(GPIOF, gpiof, PFx, 'F', 5, [ PF14: (pf14, 14, Analog, H8, exticr4), PF15: (pf15, 15, Analog, H8, exticr4), ]); -#[cfg(any( - // feature = "stm32l471", // missing PAC support for Port G - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_gpiog")] gpio!(GPIOG, gpiog, PGx, 'G', 6, [ PG0: (pg0, 0, Analog, L8, exticr1), PG1: (pg1, 1, Analog, L8, exticr1), From ebf99a851ef50e2e5345e0f56712e32d2fd2a55c Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 12:49:13 +1300 Subject: [PATCH 12/34] CAN pin gating --- src/can.rs | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/can.rs b/src/can.rs index d768ff9b..0b3f3c3e 100644 --- a/src/can.rs +++ b/src/can.rs @@ -45,8 +45,7 @@ mod common_pins { } } -// L4x1 -#[cfg(any(feature = "stm32l431", feature = "stm32l451", feature = "stm32l471"))] +#[cfg(condition = "family_L4x1")] mod pb13_pb12_af10 { use crate::gpio::{ gpiob::{PB12, PB13}, From 0b96ba8642b057d61c28774e5f246bea6a0a9899 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 12:57:20 +1300 Subject: [PATCH 13/34] more GPIO F/G --- src/gpio.rs | 36 ++---------------------------------- 1 file changed, 2 insertions(+), 34 deletions(-) diff --git a/src/gpio.rs b/src/gpio.rs index 5515d5eb..cf11ac30 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -749,41 +749,9 @@ impl Gpio

{ 'C' => crate::pac::GPIOC::ptr() as _, 'D' => crate::pac::GPIOD::ptr() as _, 'E' => crate::pac::GPIOE::ptr() as _, - #[cfg(any( - // feature = "stm32l471", // missing PAC support for Port F - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", - ))] + #[cfg(condition = "peripheral_gpiof")] 'F' => crate::pac::GPIOF::ptr() as _, - #[cfg(any( - // feature = "stm32l471", // missing PAC support for Port G - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", - ))] + #[cfg(condition = "peripheral_gpiog")] 'G' => crate::pac::GPIOG::ptr() as _, _ => crate::pac::GPIOA::ptr(), } From 1d6abd5240d00b5feee44ef3305a43aa46f927ed Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 12:59:16 +1300 Subject: [PATCH 14/34] unreachable instead of an (incorrect) register block Reaching this arm would imply things have gone very wrong --- src/gpio.rs | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gpio.rs b/src/gpio.rs index cf11ac30..dfcbd6fd 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -753,7 +753,8 @@ impl Gpio

{ 'F' => crate::pac::GPIOF::ptr() as _, #[cfg(condition = "peripheral_gpiog")] 'G' => crate::pac::GPIOG::ptr() as _, - _ => crate::pac::GPIOA::ptr(), + // any other character is an internal implementation issue and should explode + _ => unreachable!(), } } } From a39efd2c25c8cf02327833bafae8ca2df553b20c Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 14:09:37 +1300 Subject: [PATCH 15/34] fix copy paste errors in device family gates --- build/family.rs | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/build/family.rs b/build/family.rs index e845f261..f0d13312 100644 --- a/build/family.rs +++ b/build/family.rs @@ -52,32 +52,39 @@ pub(crate) const DEVICE_FAMILY: &[FeatureGate] = &[ }, FeatureGate { name: "L41_42", - state: IS_FEATURE_ENABLED_L433 || IS_FEATURE_ENABLED_L443, + state: IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422, }, FeatureGate { name: "L43_44", - state: IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L485, + state: IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L442 + || IS_FEATURE_ENABLED_L443, }, FeatureGate { name: "L45_46", - state: IS_FEATURE_ENABLED_L476 - || IS_FEATURE_ENABLED_L486 - || IS_FEATURE_ENABLED_L496 - || IS_FEATURE_ENABLED_L4A6, + state: IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462, }, FeatureGate { name: "L47_48", - state: IS_FEATURE_ENABLED_L4P5 - || IS_FEATURE_ENABLED_L4Q5 - || IS_FEATURE_ENABLED_L4R5 - || IS_FEATURE_ENABLED_L4S5, + state: IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486, }, FeatureGate { name: "L4P_4Q", - state: IS_FEATURE_ENABLED_L4S7 || IS_FEATURE_ENABLED_L4R7, + state: IS_FEATURE_ENABLED_L4P5 || IS_FEATURE_ENABLED_L4Q5, }, FeatureGate { name: "L4R_4S", - state: IS_FEATURE_ENABLED_L4S9 || IS_FEATURE_ENABLED_L4R9, + state: IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, }, ]; From 40107da4b05d63055b2b9a43e51a9a9893f9b52d Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 14:10:12 +1300 Subject: [PATCH 16/34] add gates for pretty much every peripheral (including those that are always present) --- build/peripherals.rs | 359 ++++++++++++++++++++++++++++++++++++------- 1 file changed, 305 insertions(+), 54 deletions(-) diff --git a/build/peripherals.rs b/build/peripherals.rs index 695bca14..da91b0c0 100644 --- a/build/peripherals.rs +++ b/build/peripherals.rs @@ -7,6 +7,10 @@ use crate::{features::*, FeatureGate}; /// #[cfg(condition = peripheral_)] /// ``` pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ + FeatureGate { + name: "adc1", + state: true, + }, FeatureGate { name: "adc2", state: IS_FEATURE_ENABLED_L412 @@ -59,14 +63,15 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ }, FeatureGate { name: "comp1", - state: IS_FEATURE_ENABLED_L412 - || IS_FEATURE_ENABLED_L422 - || IS_FEATURE_ENABLED_L431 - || IS_FEATURE_ENABLED_L432 - || IS_FEATURE_ENABLED_L433 - || IS_FEATURE_ENABLED_L442 - || IS_FEATURE_ENABLED_L443 - || IS_FEATURE_ENABLED_L451 + state: true, + }, + FeatureGate { + name: "comp2", + state: !(IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422), + }, + FeatureGate { + name: "dfsdm1", + state: IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462 || IS_FEATURE_ENABLED_L471 @@ -86,13 +91,39 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { - name: "comp2", - state: IS_FEATURE_ENABLED_L431 - || IS_FEATURE_ENABLED_L432 - || IS_FEATURE_ENABLED_L433 + name: "lcd", + state: IS_FEATURE_ENABLED_L433 + || IS_FEATURE_ENABLED_L443 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6, + }, + FeatureGate { + name: "aes", + state: IS_FEATURE_ENABLED_L422 || IS_FEATURE_ENABLED_L442 || IS_FEATURE_ENABLED_L443 - || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "tim1", + state: true, + }, + FeatureGate { + name: "tim2", + state: true, + }, + FeatureGate { + name: "tim3", + state: IS_FEATURE_ENABLED_L451 || IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462 || IS_FEATURE_ENABLED_L471 @@ -112,11 +143,8 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { - name: "dfsdm1", - state: IS_FEATURE_ENABLED_L451 - || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462 - || IS_FEATURE_ENABLED_L471 + name: "tim4", + state: IS_FEATURE_ENABLED_L471 || IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 || IS_FEATURE_ENABLED_L485 @@ -133,34 +161,53 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { - name: "lcd", - state: IS_FEATURE_ENABLED_L433 - || IS_FEATURE_ENABLED_L443 + name: "tim5", + state: IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 || IS_FEATURE_ENABLED_L486 || IS_FEATURE_ENABLED_L496 - || IS_FEATURE_ENABLED_L4A6, + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { - name: "aes", - state: IS_FEATURE_ENABLED_L422 + name: "tim6", + state: true, + }, + FeatureGate { + name: "tim7", + state: IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L432 + || IS_FEATURE_ENABLED_L433 || IS_FEATURE_ENABLED_L442 || IS_FEATURE_ENABLED_L443 - || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 || IS_FEATURE_ENABLED_L485 || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { - name: "tim3", - state: IS_FEATURE_ENABLED_L451 - || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462 - || IS_FEATURE_ENABLED_L471 + name: "tim8", + state: IS_FEATURE_ENABLED_L471 || IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 || IS_FEATURE_ENABLED_L485 @@ -177,24 +224,16 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { - name: "tim7", - state: IS_FEATURE_ENABLED_L431 - || IS_FEATURE_ENABLED_L432 - || IS_FEATURE_ENABLED_L433 - || IS_FEATURE_ENABLED_L442 - || IS_FEATURE_ENABLED_L443, + name: "tim15", + state: true, }, FeatureGate { - name: "i2c2", - state: IS_FEATURE_ENABLED_L412 - || IS_FEATURE_ENABLED_L422 - || IS_FEATURE_ENABLED_L431 - || IS_FEATURE_ENABLED_L433 - || IS_FEATURE_ENABLED_L443 - || IS_FEATURE_ENABLED_L451 - || IS_FEATURE_ENABLED_L452 - || IS_FEATURE_ENABLED_L462 - || IS_FEATURE_ENABLED_L471 + name: "tim16", + state: true, + }, + FeatureGate { + name: "tim17", + state: IS_FEATURE_ENABLED_L471 || IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 || IS_FEATURE_ENABLED_L485 @@ -210,10 +249,26 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4R9 || IS_FEATURE_ENABLED_L4S9, }, + FeatureGate { + name: "lptim1", + state: true, + }, + FeatureGate { + name: "lptim2", + state: true, + }, + FeatureGate { + name: "i2c1", + state: true, + }, FeatureGate { name: "i2c2", state: !(IS_FEATURE_ENABLED_L432 || IS_FEATURE_ENABLED_L442), }, + FeatureGate { + name: "i2c3", + state: true, + }, FeatureGate { name: "i2c4", state: IS_FEATURE_ENABLED_L451 @@ -230,17 +285,25 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4R9 || IS_FEATURE_ENABLED_L4S9, }, + FeatureGate { + name: "usart1", + state: true, + }, + FeatureGate { + name: "usart2", + state: true, + }, FeatureGate { name: "usart3", state: !(IS_FEATURE_ENABLED_L432 || IS_FEATURE_ENABLED_L442), }, FeatureGate { name: "uart4", - state: //IS_FEATURE_ENABLED_L451 -- missing PAC support - //|| IS_FEATURE_ENABLED_L452 -- missing PAC support - //|| IS_FEATURE_ENABLED_L462 -- missing PAC support - //|| IS_FEATURE_ENABLED_L471 -- missing PAC support - IS_FEATURE_ENABLED_L475 + state: IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 || IS_FEATURE_ENABLED_L485 || IS_FEATURE_ENABLED_L486 @@ -273,6 +336,18 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4R9 || IS_FEATURE_ENABLED_L4S9, }, + FeatureGate { + name: "lpuart1", + state: true, + }, + FeatureGate { + name: "tim16", + state: true, + }, + FeatureGate { + name: "spi1", + state: true, + }, FeatureGate { name: "spi2", state: !(IS_FEATURE_ENABLED_L432 || IS_FEATURE_ENABLED_L442), @@ -281,10 +356,48 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ name: "spi3", state: !(IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422), }, + FeatureGate { + name: "qspi", + state: IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L431 + || IS_FEATURE_ENABLED_L432 + //|| IS_FEATURE_ENABLED_L433 -- missing PAC support + || IS_FEATURE_ENABLED_L442 + //|| IS_FEATURE_ENABLED_L443 -- missing PAC support + || IS_FEATURE_ENABLED_L451 + || IS_FEATURE_ENABLED_L452 + || IS_FEATURE_ENABLED_L462 + || IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6, + }, FeatureGate { name: "sai1", state: !(IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422), }, + FeatureGate { + name: "sai2", + state: IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, FeatureGate { name: "swpmi1", state: IS_FEATURE_ENABLED_L431 @@ -301,7 +414,7 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4A6, }, FeatureGate { - name: "sdmmc", + name: "sdmmc1", state: !(IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422 || IS_FEATURE_ENABLED_L432 @@ -339,6 +452,10 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ name: "can1", state: !(IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422), }, + FeatureGate { + name: "can2", + state: IS_FEATURE_ENABLED_L496 || IS_FEATURE_ENABLED_L4A6, + }, FeatureGate { name: "rtc_type3", state: IS_FEATURE_ENABLED_L412 @@ -347,7 +464,27 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4Q5, }, FeatureGate { - name: "gpiog", + name: "gpioa", + state: true, + }, + FeatureGate { + name: "gpiob", + state: true, + }, + FeatureGate { + name: "gpioc", + state: true, + }, + FeatureGate { + name: "gpiod", + state: true, + }, + FeatureGate { + name: "gpioe", + state: true, + }, + FeatureGate { + name: "gpiof", state: //IS_FEATURE_ENABLED_L471 -- missing PAC support IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 @@ -365,7 +502,7 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4S9, }, FeatureGate { - name: "gpiof", + name: "gpiog", state: //IS_FEATURE_ENABLED_L471 -- missing PAC support IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 @@ -382,4 +519,118 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4R9 || IS_FEATURE_ENABLED_L4S9, }, + FeatureGate { + name: "gpioh", + state: true, + }, + FeatureGate { + name: "gpioi", + state: IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + // aka CRS + name: "clock_recovery_system", + state: !(IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486), + }, + FeatureGate { + name: "dac1", + state: !(IS_FEATURE_ENABLED_L412 || IS_FEATURE_ENABLED_L422), + }, + FeatureGate { + name: "opamp1", + state: true, + }, + FeatureGate { + name: "opamp2", + state: IS_FEATURE_ENABLED_L471 + || IS_FEATURE_ENABLED_L475 + || IS_FEATURE_ENABLED_L476 + || IS_FEATURE_ENABLED_L485 + || IS_FEATURE_ENABLED_L486 + || IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "dma1", + state: true, + }, + FeatureGate { + name: "dma2", + state: true, + }, + FeatureGate { + name: "crc", + state: true, + }, + FeatureGate { + // aka touch sense controller + name: "tsc", + state: true, + }, + FeatureGate { + // aka digital camera memory interface + name: "dcmi", + state: IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "dma2d", + state: IS_FEATURE_ENABLED_L496 + || IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "hash", + state: IS_FEATURE_ENABLED_L4A6 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "rng", + state: true, + }, + FeatureGate { + // aka flexible memory controller + name: "fmc", + state: true, + }, ]; From 919a532b092979b1435886540cfd3a9d1bae5882 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 14:10:31 +1300 Subject: [PATCH 17/34] update lib.rs gating --- src/lib.rs | 133 ++++++++++++++--------------------------------------- 1 file changed, 34 insertions(+), 99 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 4e4a4851..264908cb 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -10,67 +10,27 @@ #![no_std] -// the common lists of features to spec what a MCU is capable of -// lists are split by 3rd digit and 2nd digit groups - -// L4x1 -// any(feature = "stm32l431", feature = "stm32l451", feature = "stm32l471") -// L4x2 -// any(feature = "stm32l412", feature = "stm32l422", feature = "stm32l432", feature = "stm32l442", feature = "stm32l452", feature = "stm32l462") -// L4x3 -// any(feature = "stm32l433", feature = "stm32l443") -// L4x5 -// any(feature = "stm32l475") -// L4x6 -// any(feature = "stm32l476", feature = "stm32l486", feature = "stm32l496", feature = "stm32l4a6") -// L4+x9 -// any(feature = "stm32l4r9", feature = "stm32l4s9") - -// NOTE: The even member of the pair has additional hashing peripheral(s) -// L41 / L42 -// any(feature = "stm32l412", feature = "stm32l422") -// L43 / L44 -// any(feature = "stm32l431", feature = "stm32l432", feature = "stm32l433", feature = "stm32l442", feature = "stm32l443") -// L45 / L46 -// any(feature = "stm32l451", feature = "stm32l452", feature = "stm32l462") -// L47 / L48 -// any(feature = "stm32l471", feature = "stm32l475", feature = "stm32l476", feature = "stm32l486") -// L49 / L4a -// any(feature = "stm32l496", feature = "stm32l4a6") -// L4r / L4s -// any(feature = "stm32l4r9", feature = "stm32l4s9") - pub use embedded_hal as hal; pub use stm32l4; -#[cfg(any(feature = "stm32l431", feature = "stm32l451", feature = "stm32l471"))] +#[cfg(condition = "family_L4x1")] pub use stm32l4::stm32l4x1 as pac; -#[cfg(any(feature = "stm32l412", feature = "stm32l422"))] +#[cfg(condition = "family_L41_42")] pub use stm32l4::stm32l412 as pac; -#[cfg(any( - feature = "stm32l432", - feature = "stm32l442", - feature = "stm32l452", - feature = "stm32l462" -))] +#[cfg(all(condition = "family_L4x2", not(condition = "family_L41_42")))] pub use stm32l4::stm32l4x2 as pac; -#[cfg(any(feature = "stm32l433", feature = "stm32l443"))] +#[cfg(condition = "family_L4x3")] pub use stm32l4::stm32l4x3 as pac; -#[cfg(any(feature = "stm32l475"))] +#[cfg(condition = "family_L4x5")] pub use stm32l4::stm32l4x5 as pac; -#[cfg(any( - feature = "stm32l476", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6" -))] +#[cfg(condition = "family_L4x6")] pub use stm32l4::stm32l4x6 as pac; -#[cfg(any(feature = "stm32l4r9", feature = "stm32l4s9",))] +#[cfg(condition = "family_L4+x9")] pub use stm32l4::stm32l4r9 as pac; #[cfg(feature = "rt")] @@ -81,83 +41,58 @@ pub use crate::pac as stm32; pub mod traits; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod adc; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] -#[cfg(not(any(feature = "stm32l412",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(condition = "peripheral_can1")] pub mod can; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod crc; pub mod datetime; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod delay; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod dma; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod flash; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod gpio; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod i2c; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod lptimer; -#[cfg(all( - feature = "otg_fs", - any( - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - ) -))] +#[cfg(all(feature = "otg_fs", condition = "peripheral_usb_otg_fs"))] pub mod otg_fs; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod prelude; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod pwm; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod pwr; -#[cfg(not(any( - feature = "stm32l433", - feature = "stm32l443", - feature = "stm32l4r9", - feature = "stm32l4s9", -)))] +#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(condition = "peripheral_qspi")] pub mod qspi; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod rcc; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod rng; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod rtc; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod serial; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod signature; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod spi; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod time; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod timer; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod tsc; -#[cfg(all( - feature = "stm32-usbd", - any( - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l432", - feature = "stm32l442", - feature = "stm32l452", - feature = "stm32l462", - feature = "stm32l433", - feature = "stm32l443" - ) -))] +#[cfg(all(feature = "stm32-usbd", condition = "peripheral_usb_device_fs"))] pub mod usb; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any(condition = "family_L4+x9",)))] pub mod watchdog; mod sealed { From 153431eb3544b7b9658a592ac0ee6155680d9139 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 14:21:58 +1300 Subject: [PATCH 18/34] add a few missed peripherals (mostly L4+ exclusives) --- build/peripherals.rs | 75 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/build/peripherals.rs b/build/peripherals.rs index da91b0c0..4e51410e 100644 --- a/build/peripherals.rs +++ b/build/peripherals.rs @@ -633,4 +633,79 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ name: "fmc", state: true, }, + FeatureGate { + name: "firewall", + state: true, + }, + FeatureGate { + name: "vrefbuf", + state: true, + }, + FeatureGate { + name: "iwdg", + state: true, + }, + FeatureGate { + name: "wwdg", + state: true, + }, + FeatureGate { + name: "dbgmcu", + state: true, + }, + FeatureGate { + // aka LCD-TFT display controller + name: "lcdt", + state: IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + // aka MIPI display serial interface + name: "dsi", + state: IS_FEATURE_ENABLED_L4R9 || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "dmamux1", + state: IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "octspi1", + state: IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "octspi2", + state: IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5 + || IS_FEATURE_ENABLED_L4R5 + || IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S5 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4S9, + }, + FeatureGate { + name: "gfxmmu", + state: IS_FEATURE_ENABLED_L4R7 + || IS_FEATURE_ENABLED_L4R9 + || IS_FEATURE_ENABLED_L4S7 + || IS_FEATURE_ENABLED_L4S9, + }, ]; From 284ad6d8a5e93cdd9e137525bd115dd37eece9dc Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 15:01:26 +1300 Subject: [PATCH 19/34] add gpioh and gpioi H has a couple of pins that are often reserved on many parts. Full port on some larger footprints I is only present on L49 and up in the larger footprints --- src/gpio.rs | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/src/gpio.rs b/src/gpio.rs index dfcbd6fd..b06a6934 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -739,6 +739,44 @@ gpio!(GPIOG, gpiog, PGx, 'G', 6, [ PG14: (pg14, 14, Analog, H8, exticr4), PG15: (pg15, 15, Analog, H8, exticr4), ]); +#[cfg(condition = "peripheral_gpioh")] +gpio!(GPIOH, gpioh, PHx, 'H', H, [ + PH0: (ph0, 0, Input, L8, exticr1), + PH1: (ph1, 1, Input, L8, exticr1), + PH2: (ph2, 2, Input, L8, exticr1), + PH3: (ph3, 3, Input, L8, exticr1), + PH4: (ph4, 4, Input, L8, exticr2), + PH5: (ph5, 5, Input, L8, exticr2), + PH6: (ph6, 6, Input, L8, exticr2), + PH7: (ph7, 7, Input, L8, exticr2), + PH8: (ph8, 8, Input, H8, exticr3), + PH9: (ph9, 9, Input, H8, exticr3), + PH10: (ph10, 10, Input, H8, exticr3), + PH11: (ph11, 11, Input, H8, exticr3), + PH12: (ph12, 12, Input, H8, exticr4), + PH13: (ph13, 13, Input, H8, exticr4), + PH14: (ph14, 14, Input, H8, exticr4), + PH15: (ph15, 15, Input, H8, exticr4), +]); +#[cfg(condition = "peripheral_gpioi")] +gpio!(GPIOI, gpioi, PIx, 'I', I, [ + PI0: (pi0, 0, Input, L8, exticr1), + PI1: (pi1, 1, Input, L8, exticr1), + PI2: (pi2, 2, Input, L8, exticr1), + PI3: (pi3, 3, Input, L8, exticr1), + PI4: (pi4, 4, Input, L8, exticr2), + PI5: (pi5, 5, Input, L8, exticr2), + PI6: (pi6, 6, Input, L8, exticr2), + PI7: (pi7, 7, Input, L8, exticr2), + PI8: (pi8, 8, Input, H8, exticr3), + PI9: (pi9, 9, Input, H8, exticr3), + PI10: (pi10, 10, Input, H8, exticr3), + PI11: (pi11, 11, Input, H8, exticr3), + PI12: (pi12, 12, Input, H8, exticr4), + PI13: (pi13, 13, Input, H8, exticr4), + PI14: (pi14, 14, Input, H8, exticr4), + PI15: (pi15, 15, Input, H8, exticr4), +]); struct Gpio; impl Gpio

{ @@ -753,6 +791,10 @@ impl Gpio

{ 'F' => crate::pac::GPIOF::ptr() as _, #[cfg(condition = "peripheral_gpiog")] 'G' => crate::pac::GPIOG::ptr() as _, + #[cfg(condition = "peripheral_gpioh")] + 'H' => crate::pac::GPIOH::ptr() as _, + #[cfg(condition = "peripheral_gpioi")] + 'I' => crate::pac::GPIOI::ptr() as _, // any other character is an internal implementation issue and should explode _ => unreachable!(), } From 17a058035f640979080fd9cc479b7177306a0ade Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 15:23:23 +1300 Subject: [PATCH 20/34] missed the L4q5 pka peripheral --- build/peripherals.rs | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/build/peripherals.rs b/build/peripherals.rs index 4e51410e..7d699baa 100644 --- a/build/peripherals.rs +++ b/build/peripherals.rs @@ -708,4 +708,9 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ || IS_FEATURE_ENABLED_L4S7 || IS_FEATURE_ENABLED_L4S9, }, + FeatureGate { + // aka public key accelerator + name: "pka", + state: IS_FEATURE_ENABLED_L4Q5, + }, ]; From 8f5fd18ef3eafbea7c6e0ce2565d223c51198843 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 15:24:15 +1300 Subject: [PATCH 21/34] update spi gates --- src/spi.rs | 71 ++++++------------------------------------------------ 1 file changed, 8 insertions(+), 63 deletions(-) diff --git a/src/spi.rs b/src/spi.rs index 76d52075..24b6dff5 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -9,7 +9,7 @@ use core::ptr; use core::sync::atomic; use core::sync::atomic::Ordering; -#[cfg(not(any(feature = "stm32l433", feature = "stm32l443",)))] +#[cfg(not(condition = "family_L4x3"))] use crate::dma::dma2; use crate::dma::{self, dma1, TransferPayload}; use crate::gpio::{Alternate, PushPull}; @@ -269,23 +269,7 @@ macro_rules! hal { } use crate::gpio::gpiod::*; -#[cfg(any( - // feature = "stm32l471", // missing PAC support for Port G - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_gpiog")] use crate::gpio::gpiog::*; use crate::gpio::{gpioa::*, gpiob::*, gpioc::*, gpioe::*}; @@ -299,29 +283,13 @@ pins!(SPI1, 5, MISO: [PA6, PB4, PE14], MOSI: [PA7, PB5, PE15]); -#[cfg(any( - // feature = "stm32l471", // missing PAC support for Port G - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_gpiog")] pins!(SPI1, 5, SCK: [PG2], MISO: [PG3], MOSI: [PG4]); -#[cfg(not(any(feature = "stm32l433", feature = "stm32l443",)))] +#[cfg(condition = "peripheral_spi3")] use crate::stm32::SPI3; -#[cfg(not(any(feature = "stm32l433", feature = "stm32l443",)))] +#[cfg(condition = "peripheral_spi3")] hal! { SPI3: (spi3, spi3_slave, pclk1), } @@ -332,23 +300,7 @@ pins!(SPI3, 6, MISO: [PB4, PC11], MOSI: [PB5, PC12]); -#[cfg(any( - // feature = "stm32l471", // missing PAC support for Port G - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(all(condition = "peripheral_spi3", condition = "peripheral_gpiog"))] pins!(SPI3, 6, SCK: [PG9], MISO: [PG10], MOSI: [PG11]); use crate::stm32::SPI2; @@ -769,15 +721,8 @@ macro_rules! spi_dma { } spi_dma!(SPI1, dma1::C2, c2s, map1, dma1::C3, c3s, map1); -#[cfg(not(any( - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l432", - feature = "stm32l442", - feature = "stm32l452", - feature = "stm32l462", -)))] +#[cfg(not(condition = "family_L4x2"))] spi_dma!(SPI2, dma1::C4, c4s, map1, dma1::C5, c5s, map1); // spi_dma!(SPI1, dma2::C3, c3s, map4, dma2::C4, c4s, map4); -#[cfg(not(any(feature = "stm32l433", feature = "stm32l443",)))] +#[cfg(not(condition = "family_L4x3"))] spi_dma!(SPI3, dma2::C1, c1s, map3, dma2::C2, c2s, map3); From 816d121d1235018d345a2394916ec3d5624fb0d2 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 16:02:55 +1300 Subject: [PATCH 22/34] timer gates --- build/peripherals.rs | 18 +++---- src/timer.rs | 115 +++++++------------------------------------ 2 files changed, 27 insertions(+), 106 deletions(-) diff --git a/build/peripherals.rs b/build/peripherals.rs index 7d699baa..a74cbd37 100644 --- a/build/peripherals.rs +++ b/build/peripherals.rs @@ -123,10 +123,10 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ }, FeatureGate { name: "tim3", - state: IS_FEATURE_ENABLED_L451 - || IS_FEATURE_ENABLED_L452 + state: /*IS_FEATURE_ENABLED_L451 -- missing PAC support + || */IS_FEATURE_ENABLED_L452 || IS_FEATURE_ENABLED_L462 - || IS_FEATURE_ENABLED_L471 + //|| IS_FEATURE_ENABLED_L471 -- missing PAC support || IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 || IS_FEATURE_ENABLED_L485 @@ -144,8 +144,8 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ }, FeatureGate { name: "tim4", - state: IS_FEATURE_ENABLED_L471 - || IS_FEATURE_ENABLED_L475 + state: /*IS_FEATURE_ENABLED_L471 -- missing PAC suport + || */IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 || IS_FEATURE_ENABLED_L485 || IS_FEATURE_ENABLED_L486 @@ -162,8 +162,8 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ }, FeatureGate { name: "tim5", - state: IS_FEATURE_ENABLED_L471 - || IS_FEATURE_ENABLED_L475 + state: /*IS_FEATURE_ENABLED_L471 -- missing PAC suport + || */IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 || IS_FEATURE_ENABLED_L485 || IS_FEATURE_ENABLED_L486 @@ -233,8 +233,8 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ }, FeatureGate { name: "tim17", - state: IS_FEATURE_ENABLED_L471 - || IS_FEATURE_ENABLED_L475 + state: /*IS_FEATURE_ENABLED_L471 -- missing PAC suport + || */IS_FEATURE_ENABLED_L475 || IS_FEATURE_ENABLED_L476 || IS_FEATURE_ENABLED_L485 || IS_FEATURE_ENABLED_L486 diff --git a/src/timer.rs b/src/timer.rs index 34f1996b..f7e4c982 100644 --- a/src/timer.rs +++ b/src/timer.rs @@ -1,56 +1,14 @@ //! Timers use crate::hal::timer::{CountDown, Periodic}; -// missing PAC support -/* -#[cfg(any( - feature = "stm32l451", - feature = "stm32l452", - feature = "stm32l462", - feature = "stm32l471", - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] + +#[cfg(condition = "peripheral_tim3")] use crate::stm32::TIM3; -*/ -#[cfg(not(any( - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l451", - feature = "stm32l452", - feature = "stm32l462", -)))] + +#[cfg(condition = "peripheral_tim7")] use crate::stm32::TIM7; use crate::stm32::{TIM15, TIM16, TIM2, TIM6}; -#[cfg(any( - // feature = "stm32l471", // missing PAC support - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_tim17")] use crate::stm32::{TIM17, TIM4, TIM5}; // TIM1/TIM8 ("Advcanced Control Timers") -> no impl @@ -267,68 +225,31 @@ macro_rules! hal { hal! { TIM2: (tim2, free_running_tim2, APB1R1, u32), TIM6: (tim6, free_running_tim6, APB1R1, u16), - //TIM7: (tim7, free_running_tim7, APB1R1, u16), TIM15: (tim15, free_running_tim15, APB2, u16), TIM16: (tim16, free_running_tim16, APB2, u16), } -// missing PAC support -// RCC_APB1RSTR1->TIM3RST not defined -/* -#[cfg(any( - feature = "stm32l451", - feature = "stm32l452", - feature = "stm32l462", - feature = "stm32l471", - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_tim3")] hal! { - TIM3: (tim3, free_running_tim3, tim3en, tim3rst, APB1R1, u32), + TIM3: (tim3, free_running_tim3, APB1R1, u16), } -*/ - -#[cfg(not(any( - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l451", - feature = "stm32l452", - feature = "stm32l462", -)))] + +#[cfg(condition = "peripheral_tim7")] hal! { TIM7: (tim7, free_running_tim7, APB1R1, u16), } -#[cfg(any( - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(condition = "peripheral_tim4")] hal! { TIM4: (tim4, free_running_tim4, APB1R1, u16), +} + +#[cfg(condition = "peripheral_tim5")] +hal! { TIM5: (tim5, free_running_tim5, APB1R1, u32), +} + +#[cfg(condition = "peripheral_tim17")] +hal! { TIM17: (tim17, free_running_tim17, APB2, u16), } From 44e115f644564cb91b989a930ef419af73dc132c Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 16:03:44 +1300 Subject: [PATCH 23/34] fix l442 duplication --- build/build.rs | 1 - 1 file changed, 1 deletion(-) diff --git a/build/build.rs b/build/build.rs index b25b2944..fe0d2e16 100644 --- a/build/build.rs +++ b/build/build.rs @@ -12,7 +12,6 @@ fn feature_validate() -> bool { IS_FEATURE_ENABLED_L432, IS_FEATURE_ENABLED_L433, IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L442, IS_FEATURE_ENABLED_L443, IS_FEATURE_ENABLED_L451, IS_FEATURE_ENABLED_L452, From a10f398242fd64d8826fa5b4c040f0c8e59045f3 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 16:03:58 +1300 Subject: [PATCH 24/34] enable gates --- src/rcc/enable.rs | 101 ++++++++-------------------------------------- 1 file changed, 17 insertions(+), 84 deletions(-) diff --git a/src/rcc/enable.rs b/src/rcc/enable.rs index d510de3b..cda4bbb5 100644 --- a/src/rcc/enable.rs +++ b/src/rcc/enable.rs @@ -142,23 +142,7 @@ bus! { SAI1 => (APB2, sai1en, sai1smen, sai1rst), // 21 } -// L4x5 or L4x6 -#[cfg(any( - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l485", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", -))] +#[cfg(any(condition = "family_L4x5", condition = "family_L4x6"))] bus! { GPIOF => (AHB2, gpiofen, gpiofsmen, gpiofrst), // 5 GPIOG => (AHB2, gpiogen, gpiogsmen, gpiogrst), // 6 @@ -176,38 +160,18 @@ bus! { SAI2 => (APB2, sai2en, sai2smen, sai2rst), // 22 } -// L4x1 or L4x2 -#[cfg(any( - feature = "stm32l431", - feature = "stm32l451", - feature = "stm32l471", - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l432", - feature = "stm32l442", - feature = "stm32l452", - feature = "stm32l462", -))] +#[cfg(any(condition = "family_L4x1", condition = "family_L4x2"))] bus! { UART4 => (APB1R1, uart4en, uart4smen, usart4rst), // 19 // TODO: fix typo I2C4 => (APB1R2, i2c4en,, i2c4rst), // 1 // TODO: fix absent } -// L4x1, L4x2, L4x3, or L4x5 #[cfg(any( - feature = "stm32l431", - feature = "stm32l451", - feature = "stm32l471", - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l432", - feature = "stm32l442", - feature = "stm32l452", - feature = "stm32l462", - feature = "stm32l433", - feature = "stm32l443", - feature = "stm32l475", + condition = "family_L4x1", + condition = "family_L4x2", + condition = "family_L4x3", + condition = "family_L4x5" ))] bus! { DAC1 => (APB1R1, dac1en, dac1smen, dac1rst), // 29 @@ -215,75 +179,44 @@ bus! { SDMMC => (APB2, sdmmcen, sdmmcsmen, sdmmcrst), // 10 } -// L4x1, L4x2, L4x5, or L4x6 (L4+ assumed) - -#[cfg(not(any(feature = "stm32l433", feature = "stm32l443")))] +#[cfg(not(condition = "family_L4x3"))] bus! { ADC2 => (AHB2, adcen, adcfssmen, adcrst), // 13 QUADSPI => (AHB3, qspien, qspismen, qspirst), // 8 } -// L4x1, L4x2, L4x3, or L4x6 (L4+ assumed) -#[cfg(not(any(feature = "stm32l475",)))] +#[cfg(not(condition = "family_L4x5"))] bus! { CRS => (APB1R1, crsen,,), // 24 // TODO: fix absent } -// L4x1, or L4x3 -#[cfg(any( - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l432", - feature = "stm32l442", - feature = "stm32l452", - feature = "stm32l462", - feature = "stm32l433", - feature = "stm32l443", -))] +#[cfg(any(condition = "family_L4x1", condition = "family_L4x3"))] +#[cfg(condition = "peripheral_usb_device_fs")] bus! { USB => (APB1R1, usbfsen, usbfssmen, usbfsrst), // 26 } -// L4x1 -#[cfg(any(feature = "stm32l431", feature = "stm32l451", feature = "stm32l471",))] +#[cfg(condition = "family_L4x1")] bus! { TIM3 => (APB1R1, tim3en,,), // 1 // TODO: absent smen, rst USB_FS => (APB1R1, usbf, usbfssmen, usbfsrst), // 26 // TODO: fix typo } -// L4x2 -#[cfg(any( - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l432", - feature = "stm32l442", - feature = "stm32l452", - feature = "stm32l462", -))] +#[cfg(condition = "family_L4x2")] bus! { TIM3 => (APB1R1, tim3en,, tim3rst), // 1 // TODO: fix absent } -// L4x5 -#[cfg(any(feature = "stm32l475"))] +#[cfg(condition = "family_L4x5")] bus! { DFSDM => (APB2, dfsdmen, dfsdmsmen, dfsdmrst), // 24 } -// L4x6 (L4+ assumed) #[cfg(any( - feature = "stm32l476", - feature = "stm32l486", - feature = "stm32l496", - feature = "stm32l4a6", - // feature = "stm32l4p5", - // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", - // feature = "stm32l4r7", - // feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9", + condition = "family_L4x6", + condition = "family_L4+x5", + condition = "family_L4+x7", + condition = "family_L4+x9" ))] bus! { DMA2D => (AHB1, dma2den, dma2dsmen, dma2drst), // 17 From 4260ae0745cc4cf8d8391156edc98995e0dbca61 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 16:04:09 +1300 Subject: [PATCH 25/34] fix spi gates --- src/spi.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/spi.rs b/src/spi.rs index 24b6dff5..8ba1659c 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -9,7 +9,7 @@ use core::ptr; use core::sync::atomic; use core::sync::atomic::Ordering; -#[cfg(not(condition = "family_L4x3"))] +#[cfg(all(condition = "peripheral_spi3", not(condition = "family_L4x3")))] use crate::dma::dma2; use crate::dma::{self, dma1, TransferPayload}; use crate::gpio::{Alternate, PushPull}; @@ -294,7 +294,7 @@ hal! { SPI3: (spi3, spi3_slave, pclk1), } -#[cfg(not(any(feature = "stm32l433", feature = "stm32l443",)))] +#[cfg(all(condition = "peripheral_spi3", not(condition = "family_L4x3")))] pins!(SPI3, 6, SCK: [PB3, PC10], MISO: [PB4, PC11], @@ -724,5 +724,5 @@ spi_dma!(SPI1, dma1::C2, c2s, map1, dma1::C3, c3s, map1); #[cfg(not(condition = "family_L4x2"))] spi_dma!(SPI2, dma1::C4, c4s, map1, dma1::C5, c5s, map1); // spi_dma!(SPI1, dma2::C3, c3s, map4, dma2::C4, c4s, map4); -#[cfg(not(condition = "family_L4x3"))] +#[cfg(all(condition = "peripheral_spi3", not(condition = "family_L4x3")))] spi_dma!(SPI3, dma2::C1, c1s, map3, dma2::C2, c2s, map3); From 9cac39e8a9ba4dd7674ea83987acb14f31f3062f Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 16:04:21 +1300 Subject: [PATCH 26/34] update signature gates --- src/signature.rs | 21 +++++---------------- 1 file changed, 5 insertions(+), 16 deletions(-) diff --git a/src/signature.rs b/src/signature.rs index 5e94ebff..2abce5f5 100644 --- a/src/signature.rs +++ b/src/signature.rs @@ -119,23 +119,12 @@ impl VtempCalHigh { /// aka TS_CAL2_TEMP in reference manual /// Feature gate Required: this is 110 for L47x/L48x, 130 for other L4s according to /// https://github.com/STMicroelectronics/STM32CubeL4/blob/5e1553e07706491bd11f4edd304e093b6e4b83a4/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h#L352-L356 + pub const TEMP_DEGREES: u16 = if cfg!(condition = "family_L47_48") { + 110 + } else { + 130 + }; - // L47/L48 - #[cfg(any( - feature = "stm32l471", - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l486" - ))] - pub const TEMP_DEGREES: u16 = 110; - // else - #[cfg(not(any( - feature = "stm32l471", - feature = "stm32l475", - feature = "stm32l476", - feature = "stm32l486" - )))] - pub const TEMP_DEGREES: u16 = 130; /// Read calibration value pub fn read(&self) -> u16 { self.0 From 790ac09dc558bda30b4a0a49dce32d790a82f531 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 16:10:37 +1300 Subject: [PATCH 27/34] update rtc2 conditional --- src/rtc/rtc2.rs | 27 +++++++++------------------ 1 file changed, 9 insertions(+), 18 deletions(-) diff --git a/src/rtc/rtc2.rs b/src/rtc/rtc2.rs index a30cf571..11f5f9ee 100644 --- a/src/rtc/rtc2.rs +++ b/src/rtc/rtc2.rs @@ -75,24 +75,15 @@ pub fn is_alarm_b_accessible(rtc: &RTC) -> bool { // AN7459 // L4 series except L41/2 has 20 backup registers // L41/2, L4P/Q and L4R/S have 32 backup registers -#[cfg(not(any( - feature = "stm32l4r5", - feature = "stm32l4s5", - feature = "stm32l4r7", - feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9" -)))] -pub const BACKUP_REGISTER_COUNT: usize = 20; -#[cfg(any( - feature = "stm32l4r5", - feature = "stm32l4s5", - feature = "stm32l4r7", - feature = "stm32l4s7", - feature = "stm32l4r9", - feature = "stm32l4s9" -))] -pub const BACKUP_REGISTER_COUNT: usize = 32; +pub const BACKUP_REGISTER_COUNT: usize = if cfg!(any( + condition = "family_L41_42", + condition = "family_L4P_4Q", + condition = "family_L4R_4S", +)) { + 32 +} else { + 20 +}; /// Read content of the backup register. /// From f78a52f286634f98d8c3a2e9461517748ae0564e Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 16:11:24 +1300 Subject: [PATCH 28/34] update watchdog conditional --- src/watchdog.rs | 28 ++++++---------------------- 1 file changed, 6 insertions(+), 22 deletions(-) diff --git a/src/watchdog.rs b/src/watchdog.rs index 0d1204f5..f08db6e7 100644 --- a/src/watchdog.rs +++ b/src/watchdog.rs @@ -28,31 +28,15 @@ impl IndependentWatchdog { /// Debug independent watchdog stopped when core is halted pub fn stop_on_debug(&self, dbgmcu: &DBGMCU, stop: bool) { #[cfg(any( - feature = "stm32l431", - feature = "stm32l451", - feature = "stm32l471", - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l432", - feature = "stm32l442", - feature = "stm32l452", - feature = "stm32l462", - feature = "stm32l433", - feature = "stm32l443", + condition = "family_L4x1", + condition = "family_L4x2", + condition = "family_L4x3", ))] dbgmcu.apb1fzr1.modify(|_, w| w.dbg_iwdg_stop().bit(stop)); #[cfg(not(any( - feature = "stm32l431", - feature = "stm32l451", - feature = "stm32l471", - feature = "stm32l412", - feature = "stm32l422", - feature = "stm32l432", - feature = "stm32l442", - feature = "stm32l452", - feature = "stm32l462", - feature = "stm32l433", - feature = "stm32l443", + condition = "family_L4x1", + condition = "family_L4x2", + condition = "family_L4x3", )))] dbgmcu.apb1_fzr1.modify(|_, w| w.dbg_iwdg_stop().bit(stop)); } From d22a5e86a2533e9285d25af1b4ad97c3fce538ce Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Sat, 25 Dec 2021 16:14:38 +1300 Subject: [PATCH 29/34] add l485 to ci --- .github/workflows/ci.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index ba1341a0..023f398f 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -26,6 +26,7 @@ jobs: - stm32l471 - stm32l475 - stm32l476 + - stm32l485 - stm32l486 - stm32l496 - stm32l4a6 From 5ee0f299ca7900ea887cac0fc949c769516b969c Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Wed, 9 Feb 2022 13:06:27 +1300 Subject: [PATCH 30/34] split feature check and generation into a child module It is likely the build script will be extended to cover other activities in future. Modularise early to keep things tidy --- build/build.rs | 56 +++----------------------- build/{ => features}/family.rs | 0 build/{features.rs => features/mod.rs} | 53 ++++++++++++++++++++++++ build/{ => features}/peripherals.rs | 0 4 files changed, 58 insertions(+), 51 deletions(-) rename build/{ => features}/family.rs (100%) rename build/{features.rs => features/mod.rs} (55%) rename build/{ => features}/peripherals.rs (100%) diff --git a/build/build.rs b/build/build.rs index fe0d2e16..6ba9882f 100644 --- a/build/build.rs +++ b/build/build.rs @@ -1,44 +1,9 @@ -use crate::features::*; - -pub(crate) mod family; pub(crate) mod features; -pub(crate) mod peripherals; - -fn feature_validate() -> bool { - const DEVICE_FEATURES: &[bool] = &[ - IS_FEATURE_ENABLED_L412, - IS_FEATURE_ENABLED_L422, - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L432, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, - IS_FEATURE_ENABLED_L471, - IS_FEATURE_ENABLED_L475, - IS_FEATURE_ENABLED_L476, - IS_FEATURE_ENABLED_L485, - IS_FEATURE_ENABLED_L486, - IS_FEATURE_ENABLED_L496, - IS_FEATURE_ENABLED_L4A6, - //IS_FEATURE_ENABLED_L4P5, - //IS_FEATURE_ENABLED_L4Q5, - //IS_FEATURE_ENABLED_L4R5, - //IS_FEATURE_ENABLED_L4S5, - //IS_FEATURE_ENABLED_L4R7, - //IS_FEATURE_ENABLED_L4S7, - IS_FEATURE_ENABLED_L4R9, - IS_FEATURE_ENABLED_L4S9, - ]; - DEVICE_FEATURES.iter().filter(|&&b| b).count() == 1 -} fn main() { - if !feature_validate() { - panic!( - " + assert!( + features::validate_selected_features(), + " This crate requires exactly one of the following features to be enabled: stm32l431, stm32l451, stm32l471 stm32l412, stm32l422, stm32l432, stm32l442, stm32l452, stm32l462 @@ -47,19 +12,8 @@ This crate requires exactly one of the following features to be enabled: stm32l476, stm32l486, stm32l496, stm32l4a6 stm32l4r9, stm32l4s9 " - ); - } - - for gate in peripherals::PERIPHERAL_FEATURES { - if gate.state { - println!(r#"cargo:rustc-cfg=condition="peripheral_{}""#, gate.name); - } - } - for gate in family::DEVICE_FAMILY { - if gate.state { - println!(r#"cargo:rustc-cfg=condition="family_{}""#, gate.name); - } - } + ); + features::generate_internal_features(); } pub(crate) struct FeatureGate<'a> { diff --git a/build/family.rs b/build/features/family.rs similarity index 100% rename from build/family.rs rename to build/features/family.rs diff --git a/build/features.rs b/build/features/mod.rs similarity index 55% rename from build/features.rs rename to build/features/mod.rs index 3934ce5b..fee17102 100644 --- a/build/features.rs +++ b/build/features/mod.rs @@ -1,3 +1,28 @@ +pub(crate) mod family; +pub(crate) mod peripherals; + +/// check that a valid combination of externally visible features has been enabled by dependant crates +/// this check asserts: +/// * exactly one of the device selection features is enabled (e.g. stm32l432) +pub(crate) fn validate_selected_features() -> bool { + let check_selected_device = DEVICE_FEATURES.iter().filter(|&&b| b).count() == 1; + + check_selected_device +} + +pub(crate) fn generate_internal_features() { + for gate in peripherals::PERIPHERAL_FEATURES { + if gate.state { + println!(r#"cargo:rustc-cfg=condition="peripheral_{}""#, gate.name); + } + } + for gate in family::DEVICE_FAMILY { + if gate.state { + println!(r#"cargo:rustc-cfg=condition="family_{}""#, gate.name); + } + } +} + pub(crate) const IS_FEATURE_ENABLED_L412: bool = cfg!(feature = "stm32l412"); pub(crate) const IS_FEATURE_ENABLED_L422: bool = cfg!(feature = "stm32l422"); pub(crate) const IS_FEATURE_ENABLED_L431: bool = cfg!(feature = "stm32l431"); @@ -23,3 +48,31 @@ pub(crate) const IS_FEATURE_ENABLED_L4R7: bool = cfg!(feature = "stm32l4r7"); pub(crate) const IS_FEATURE_ENABLED_L4S7: bool = cfg!(feature = "stm32l4s7"); pub(crate) const IS_FEATURE_ENABLED_L4R9: bool = cfg!(feature = "stm32l4r9"); pub(crate) const IS_FEATURE_ENABLED_L4S9: bool = cfg!(feature = "stm32l4s9"); + +const DEVICE_FEATURES: &[bool] = &[ + IS_FEATURE_ENABLED_L412, + IS_FEATURE_ENABLED_L422, + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, + IS_FEATURE_ENABLED_L471, + IS_FEATURE_ENABLED_L475, + IS_FEATURE_ENABLED_L476, + IS_FEATURE_ENABLED_L485, + IS_FEATURE_ENABLED_L486, + IS_FEATURE_ENABLED_L496, + IS_FEATURE_ENABLED_L4A6, + //IS_FEATURE_ENABLED_L4P5, + //IS_FEATURE_ENABLED_L4Q5, + //IS_FEATURE_ENABLED_L4R5, + //IS_FEATURE_ENABLED_L4S5, + //IS_FEATURE_ENABLED_L4R7, + //IS_FEATURE_ENABLED_L4S7, + IS_FEATURE_ENABLED_L4R9, + IS_FEATURE_ENABLED_L4S9, +]; diff --git a/build/peripherals.rs b/build/features/peripherals.rs similarity index 100% rename from build/peripherals.rs rename to build/features/peripherals.rs From 135d0ba296ea8f276397b5db6193a3dad5731671 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Wed, 9 Feb 2022 13:41:43 +1300 Subject: [PATCH 31/34] documentation cleanup, split peripherals into presence and variants --- build/features/family.rs | 6 +-- build/features/mod.rs | 89 +++++++++++++++++++++++------------ build/features/peripherals.rs | 32 +++++++++---- 3 files changed, 81 insertions(+), 46 deletions(-) diff --git a/build/features/family.rs b/build/features/family.rs index f0d13312..6fa1d3c0 100644 --- a/build/features/family.rs +++ b/build/features/family.rs @@ -1,11 +1,7 @@ use crate::{features::*, FeatureGate}; /// list of peripherals to be gated and whether they are present for the selected features -/// they can then be checked in the library using -/// -/// ```Rust -/// #[cfg(condition = peripheral_)] -/// ``` +/// see [crate::features::generate_internal_features()] for how to reference these pub(crate) const DEVICE_FAMILY: &[FeatureGate] = &[ FeatureGate { name: "L4x1", diff --git a/build/features/mod.rs b/build/features/mod.rs index fee17102..460c2da6 100644 --- a/build/features/mod.rs +++ b/build/features/mod.rs @@ -5,20 +5,75 @@ pub(crate) mod peripherals; /// this check asserts: /// * exactly one of the device selection features is enabled (e.g. stm32l432) pub(crate) fn validate_selected_features() -> bool { + const DEVICE_FEATURES: &[bool] = &[ + IS_FEATURE_ENABLED_L412, + IS_FEATURE_ENABLED_L422, + IS_FEATURE_ENABLED_L431, + IS_FEATURE_ENABLED_L432, + IS_FEATURE_ENABLED_L433, + IS_FEATURE_ENABLED_L442, + IS_FEATURE_ENABLED_L443, + IS_FEATURE_ENABLED_L451, + IS_FEATURE_ENABLED_L452, + IS_FEATURE_ENABLED_L462, + IS_FEATURE_ENABLED_L471, + IS_FEATURE_ENABLED_L475, + IS_FEATURE_ENABLED_L476, + IS_FEATURE_ENABLED_L485, + IS_FEATURE_ENABLED_L486, + IS_FEATURE_ENABLED_L496, + IS_FEATURE_ENABLED_L4A6, + // These don't count since there isn't an official feature for them + //IS_FEATURE_ENABLED_L4P5, + //IS_FEATURE_ENABLED_L4Q5, + //IS_FEATURE_ENABLED_L4R5, + //IS_FEATURE_ENABLED_L4S5, + //IS_FEATURE_ENABLED_L4R7, + //IS_FEATURE_ENABLED_L4S7, + IS_FEATURE_ENABLED_L4R9, + IS_FEATURE_ENABLED_L4S9, + ]; let check_selected_device = DEVICE_FEATURES.iter().filter(|&&b| b).count() == 1; check_selected_device } +/// the features listed in the crate TOML (e.g. stm32l432) aren't the most enlightening things when developing +/// (e.g. which U(S)ARTs are present). This function produces a number of internal gates which can be checked almost +/// exactly like a standard cargo feature +/// +/// ## To check if the device belongs to a family group +/// e.g. for the L432, the following conditions are true +/// ```ignore +/// #[cfg(family = "L43_44")] // group by the second digit +/// #[cfg(family = "L4x2")] // group by the third digit +/// ``` +/// ## To check whether a peripheral is present +/// For completeness, even the peripherals which are always present can be checked +/// NOTE: A peripheral missing from the list is a bug +/// ```ignore +/// #[cfg(has_peripheral = "adc1")] +/// ``` +/// ## To check a peripheral variant +/// Some peripherals have a limited number of variations that it may be clearer to check against +/// e.g. The L4 RTC comes in two types (RTC2 / RTC3. See AN4759) +/// ```ignore +/// #[cfg(has_peripheral_variant = "rtc_type3")] +/// ``` pub(crate) fn generate_internal_features() { + for gate in family::DEVICE_FAMILY { + if gate.state { + println!(r#"cargo:rustc-cfg=family="{}""#, gate.name); + } + } for gate in peripherals::PERIPHERAL_FEATURES { if gate.state { - println!(r#"cargo:rustc-cfg=condition="peripheral_{}""#, gate.name); + println!(r#"cargo:rustc-cfg=has_peripheral="{}""#, gate.name); } } - for gate in family::DEVICE_FAMILY { + for gate in peripherals::PERIPHERAL_VARIANTS { if gate.state { - println!(r#"cargo:rustc-cfg=condition="family_{}""#, gate.name); + println!(r#"cargo:rustc-cfg=has_peripheral_variant="{}""#, gate.name); } } } @@ -48,31 +103,3 @@ pub(crate) const IS_FEATURE_ENABLED_L4R7: bool = cfg!(feature = "stm32l4r7"); pub(crate) const IS_FEATURE_ENABLED_L4S7: bool = cfg!(feature = "stm32l4s7"); pub(crate) const IS_FEATURE_ENABLED_L4R9: bool = cfg!(feature = "stm32l4r9"); pub(crate) const IS_FEATURE_ENABLED_L4S9: bool = cfg!(feature = "stm32l4s9"); - -const DEVICE_FEATURES: &[bool] = &[ - IS_FEATURE_ENABLED_L412, - IS_FEATURE_ENABLED_L422, - IS_FEATURE_ENABLED_L431, - IS_FEATURE_ENABLED_L432, - IS_FEATURE_ENABLED_L433, - IS_FEATURE_ENABLED_L442, - IS_FEATURE_ENABLED_L443, - IS_FEATURE_ENABLED_L451, - IS_FEATURE_ENABLED_L452, - IS_FEATURE_ENABLED_L462, - IS_FEATURE_ENABLED_L471, - IS_FEATURE_ENABLED_L475, - IS_FEATURE_ENABLED_L476, - IS_FEATURE_ENABLED_L485, - IS_FEATURE_ENABLED_L486, - IS_FEATURE_ENABLED_L496, - IS_FEATURE_ENABLED_L4A6, - //IS_FEATURE_ENABLED_L4P5, - //IS_FEATURE_ENABLED_L4Q5, - //IS_FEATURE_ENABLED_L4R5, - //IS_FEATURE_ENABLED_L4S5, - //IS_FEATURE_ENABLED_L4R7, - //IS_FEATURE_ENABLED_L4S7, - IS_FEATURE_ENABLED_L4R9, - IS_FEATURE_ENABLED_L4S9, -]; diff --git a/build/features/peripherals.rs b/build/features/peripherals.rs index a74cbd37..d9212091 100644 --- a/build/features/peripherals.rs +++ b/build/features/peripherals.rs @@ -1,11 +1,7 @@ use crate::{features::*, FeatureGate}; /// list of peripherals to be gated and whether they are present for the selected features -/// they can then be checked in the library using -/// -/// ```Rust -/// #[cfg(condition = peripheral_)] -/// ``` +/// see [crate::features::generate_internal_features()] for how to reference these pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ FeatureGate { name: "adc1", @@ -457,11 +453,8 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ state: IS_FEATURE_ENABLED_L496 || IS_FEATURE_ENABLED_L4A6, }, FeatureGate { - name: "rtc_type3", - state: IS_FEATURE_ENABLED_L412 - || IS_FEATURE_ENABLED_L422 - || IS_FEATURE_ENABLED_L4P5 - || IS_FEATURE_ENABLED_L4Q5, + name: "rtc", + state: true, }, FeatureGate { name: "gpioa", @@ -714,3 +707,22 @@ pub(crate) const PERIPHERAL_FEATURES: &[FeatureGate] = &[ state: IS_FEATURE_ENABLED_L4Q5, }, ]; + +/// list of peripherals variants to be gated and whether they are present for the selected features +/// see [crate::features::generate_internal_features()] for how to reference these +pub(crate) const PERIPHERAL_VARIANTS: &[FeatureGate] = &[ + FeatureGate { + name: "rtc_type3", + state: IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5, + }, + FeatureGate { + name: "rtc_type2", + state: !(IS_FEATURE_ENABLED_L412 + || IS_FEATURE_ENABLED_L422 + || IS_FEATURE_ENABLED_L4P5 + || IS_FEATURE_ENABLED_L4Q5), + }, +]; From 9cb7e983cf6067b76037e7fa49abfb1d0ab53bd4 Mon Sep 17 00:00:00 2001 From: DerFetzer Date: Sun, 9 Jan 2022 14:34:04 +0100 Subject: [PATCH 32/34] Swap QSPI pins and remove conflicting/wrong implementations (#283) # Conflicts: # src/qspi.rs --- src/qspi.rs | 18 ------------------ 1 file changed, 18 deletions(-) diff --git a/src/qspi.rs b/src/qspi.rs index 5459152a..689ea2a8 100644 --- a/src/qspi.rs +++ b/src/qspi.rs @@ -12,9 +12,6 @@ use crate::gpio::{ gpiod::{PD3, PD4, PD5, PD6, PD7}, }; -#[cfg(condition = "family_L4x2")] -use crate::gpio::gpiob::PB2; - #[cfg(condition = "family_L4x6")] use crate::gpio::{ gpioc::{PC1, PC2, PC4, PC5}, @@ -718,21 +715,6 @@ pins!( IO3: [PD7] ); -#[cfg(condition = "family_L4x2")] -impl IO0Pin for PB1> { - fn set_speed(self, speed: Speed) -> Self { - self.set_speed(speed) - } -} -#[cfg(condition = "family_L4x2")] -impl private::Sealed for PB2> {} -#[cfg(condition = "family_L4x2")] -impl IO1Pin for PB2> { - fn set_speed(self, speed: Speed) -> Self { - self.set_speed(speed) - } -} - #[cfg(condition = "family_L4x6")] pins!( QUADSPI, From 4873b9e150968dc011c556dc20770107978512a9 Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Wed, 9 Feb 2022 13:58:45 +1300 Subject: [PATCH 33/34] forgot to update the gates in source... --- src/can.rs | 2 +- src/gpio.rs | 80 +++++++++++++++++++++++------------------------ src/i2c.rs | 66 +++++++++++++++++++------------------- src/lib.rs | 68 ++++++++++++++++++++-------------------- src/qspi.rs | 8 ++--- src/rcc/enable.rs | 32 +++++++------------ src/rtc.rs | 8 ++--- src/rtc/rtc2.rs | 15 ++++----- src/serial.rs | 12 +++---- src/signature.rs | 6 +--- src/spi.rs | 18 +++++------ src/timer.rs | 16 +++++----- src/watchdog.rs | 12 ++----- 13 files changed, 159 insertions(+), 184 deletions(-) diff --git a/src/can.rs b/src/can.rs index 0b3f3c3e..f8c4b4f2 100644 --- a/src/can.rs +++ b/src/can.rs @@ -45,7 +45,7 @@ mod common_pins { } } -#[cfg(condition = "family_L4x1")] +#[cfg(family = "L4x1")] mod pb13_pb12_af10 { use crate::gpio::{ gpiob::{PB12, PB13}, diff --git a/src/gpio.rs b/src/gpio.rs index b06a6934..e618caca 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -701,7 +701,7 @@ gpio!(GPIOE, gpioe, PEx, 'E', 4, [ PE15: (pe15, 15, Analog, H8, exticr4), ]); -#[cfg(condition = "peripheral_gpiof")] +#[cfg(has_peripheral = "gpiof")] gpio!(GPIOF, gpiof, PFx, 'F', 5, [ PF0: (pf0, 0, Analog, L8, exticr1), PF1: (pf1, 1, Analog, L8, exticr1), @@ -720,7 +720,7 @@ gpio!(GPIOF, gpiof, PFx, 'F', 5, [ PF14: (pf14, 14, Analog, H8, exticr4), PF15: (pf15, 15, Analog, H8, exticr4), ]); -#[cfg(condition = "peripheral_gpiog")] +#[cfg(has_peripheral = "gpiog")] gpio!(GPIOG, gpiog, PGx, 'G', 6, [ PG0: (pg0, 0, Analog, L8, exticr1), PG1: (pg1, 1, Analog, L8, exticr1), @@ -739,43 +739,43 @@ gpio!(GPIOG, gpiog, PGx, 'G', 6, [ PG14: (pg14, 14, Analog, H8, exticr4), PG15: (pg15, 15, Analog, H8, exticr4), ]); -#[cfg(condition = "peripheral_gpioh")] +#[cfg(has_peripheral = "gpioh")] gpio!(GPIOH, gpioh, PHx, 'H', H, [ - PH0: (ph0, 0, Input, L8, exticr1), - PH1: (ph1, 1, Input, L8, exticr1), - PH2: (ph2, 2, Input, L8, exticr1), - PH3: (ph3, 3, Input, L8, exticr1), - PH4: (ph4, 4, Input, L8, exticr2), - PH5: (ph5, 5, Input, L8, exticr2), - PH6: (ph6, 6, Input, L8, exticr2), - PH7: (ph7, 7, Input, L8, exticr2), - PH8: (ph8, 8, Input, H8, exticr3), - PH9: (ph9, 9, Input, H8, exticr3), - PH10: (ph10, 10, Input, H8, exticr3), - PH11: (ph11, 11, Input, H8, exticr3), - PH12: (ph12, 12, Input, H8, exticr4), - PH13: (ph13, 13, Input, H8, exticr4), - PH14: (ph14, 14, Input, H8, exticr4), - PH15: (ph15, 15, Input, H8, exticr4), + PH0: (ph0, 0, Analog, L8, exticr1), + PH1: (ph1, 1, Analog, L8, exticr1), + PH2: (ph2, 2, Analog, L8, exticr1), + PH3: (ph3, 3, Analog, L8, exticr1), + PH4: (ph4, 4, Analog, L8, exticr2), + PH5: (ph5, 5, Analog, L8, exticr2), + PH6: (ph6, 6, Analog, L8, exticr2), + PH7: (ph7, 7, Analog, L8, exticr2), + PH8: (ph8, 8, Analog, H8, exticr3), + PH9: (ph9, 9, Analog, H8, exticr3), + PH10: (ph10, 10, Analog, H8, exticr3), + PH11: (ph11, 11, Analog, H8, exticr3), + PH12: (ph12, 12, Analog, H8, exticr4), + PH13: (ph13, 13, Analog, H8, exticr4), + PH14: (ph14, 14, Analog, H8, exticr4), + PH15: (ph15, 15, Analog, H8, exticr4), ]); -#[cfg(condition = "peripheral_gpioi")] +#[cfg(has_peripheral = "gpioi")] gpio!(GPIOI, gpioi, PIx, 'I', I, [ - PI0: (pi0, 0, Input, L8, exticr1), - PI1: (pi1, 1, Input, L8, exticr1), - PI2: (pi2, 2, Input, L8, exticr1), - PI3: (pi3, 3, Input, L8, exticr1), - PI4: (pi4, 4, Input, L8, exticr2), - PI5: (pi5, 5, Input, L8, exticr2), - PI6: (pi6, 6, Input, L8, exticr2), - PI7: (pi7, 7, Input, L8, exticr2), - PI8: (pi8, 8, Input, H8, exticr3), - PI9: (pi9, 9, Input, H8, exticr3), - PI10: (pi10, 10, Input, H8, exticr3), - PI11: (pi11, 11, Input, H8, exticr3), - PI12: (pi12, 12, Input, H8, exticr4), - PI13: (pi13, 13, Input, H8, exticr4), - PI14: (pi14, 14, Input, H8, exticr4), - PI15: (pi15, 15, Input, H8, exticr4), + PI0: (pi0, 0, Analog, L8, exticr1), + PI1: (pi1, 1, Analog, L8, exticr1), + PI2: (pi2, 2, Analog, L8, exticr1), + PI3: (pi3, 3, Analog, L8, exticr1), + PI4: (pi4, 4, Analog, L8, exticr2), + PI5: (pi5, 5, Analog, L8, exticr2), + PI6: (pi6, 6, Analog, L8, exticr2), + PI7: (pi7, 7, Analog, L8, exticr2), + PI8: (pi8, 8, Analog, H8, exticr3), + PI9: (pi9, 9, Analog, H8, exticr3), + PI10: (pi10, 10, Analog, H8, exticr3), + PI11: (pi11, 11, Analog, H8, exticr3), + PI12: (pi12, 12, Analog, H8, exticr4), + PI13: (pi13, 13, Analog, H8, exticr4), + PI14: (pi14, 14, Analog, H8, exticr4), + PI15: (pi15, 15, Analog, H8, exticr4), ]); struct Gpio; @@ -787,13 +787,13 @@ impl Gpio

{ 'C' => crate::pac::GPIOC::ptr() as _, 'D' => crate::pac::GPIOD::ptr() as _, 'E' => crate::pac::GPIOE::ptr() as _, - #[cfg(condition = "peripheral_gpiof")] + #[cfg(has_peripheral = "gpiof")] 'F' => crate::pac::GPIOF::ptr() as _, - #[cfg(condition = "peripheral_gpiog")] + #[cfg(has_peripheral = "gpiog")] 'G' => crate::pac::GPIOG::ptr() as _, - #[cfg(condition = "peripheral_gpioh")] + #[cfg(has_peripheral = "gpioh")] 'H' => crate::pac::GPIOH::ptr() as _, - #[cfg(condition = "peripheral_gpioi")] + #[cfg(has_peripheral = "gpioi")] 'I' => crate::pac::GPIOI::ptr() as _, // any other character is an internal implementation issue and should explode _ => unreachable!(), diff --git a/src/i2c.rs b/src/i2c.rs index dcfd1893..be0c7d71 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -4,9 +4,9 @@ use crate::hal::blocking::i2c::{Read, Write, WriteRead}; -#[cfg(condition = "peripheral_i2c2")] +#[cfg(has_peripheral = "i2c2")] use crate::pac::I2C2; -#[cfg(condition = "peripheral_i2c4")] +#[cfg(has_peripheral = "i2c4")] use crate::pac::I2C4; use crate::pac::{i2c1, I2C1, I2C3}; @@ -186,11 +186,11 @@ macro_rules! hal { } hal!(I2C1, i2c1); -#[cfg(condition = "peripheral_i2c2")] +#[cfg(has_peripheral = "i2c2")] hal!(I2C2, i2c2); hal!(I2C3, i2c3); -#[cfg(condition = "peripheral_i2c4")] +#[cfg(has_peripheral = "i2c4")] hal!(I2C4, i2c4); impl I2c @@ -443,11 +443,11 @@ where } } -#[cfg(condition = "family_L4x1")] +#[cfg(family = "L4x1")] mod stm32l4x1_pins { - #[cfg(condition = "peripheral_i2c2")] + #[cfg(has_peripheral = "i2c2")] use super::I2C2; - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] use super::I2C4; use super::{I2C1, I2C3}; use crate::gpio::*; @@ -462,26 +462,26 @@ mod stm32l4x1_pins { #[cfg(not(feature = "stm32l471"))] pins!(I2C1, 4, SCL: [PA9], SDA: [PA10]); - #[cfg(condition = "peripheral_i2c2")] + #[cfg(has_peripheral = "i2c2")] pins!(I2C2, 4, SCL: [PB10, PB13], SDA: [PB11, PB14]); pins!(I2C3, 4, SCL: [PC0], SDA: [PC1]); #[cfg(not(feature = "stm32l471"))] pins!(I2C3, 4, SCL: [PA7], SDA: [PB4]); - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] use gpiod::{PD12, PD13}; - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] pins!(I2C4, 4, SCL: [PD12], SDA: [PD13]); - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] pins!(I2C4, 3, SCL: [PB10], SDA: [PB11]); } -#[cfg(condition = "family_L4x2")] +#[cfg(family = "L4x2")] mod stm32l4x2_pins { - #[cfg(condition = "peripheral_i2c2")] + #[cfg(has_peripheral = "i2c2")] use super::I2C2; - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] use super::I2C4; use super::{I2C1, I2C3}; use crate::gpio::*; @@ -496,24 +496,24 @@ mod stm32l4x2_pins { #[cfg(not(any(feature = "stm32l432", feature = "stm32l442")))] pins!(I2C1, 4, SCL: [PB8], SDA: [PB9]); - #[cfg(condition = "peripheral_i2c2")] + #[cfg(has_peripheral = "i2c2")] pins!(I2C2, 4, SCL: [PB10, PB13], SDA: [PB11, PB14]); pins!(I2C3, 4, SCL: [PA7], SDA: [PB4]); #[cfg(not(any(feature = "stm32l432", feature = "stm32l442")))] pins!(I2C3, 4, SCL: [PC0], SDA: [PC1]); - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] pins!(I2C4, 2, SCL: [PC0], SDA: [PC1]); - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] pins!(I2C4, 3, SCL: [PB10], SDA: [PB11]); - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] pins!(I2C4, 4, SCL: [PD12], SDA: [PD13]); } -#[cfg(condition = "family_L4x3")] +#[cfg(family = "L4x3")] mod stm32l4x3_pins { - #[cfg(condition = "peripheral_i2c2")] + #[cfg(has_peripheral = "i2c2")] use super::I2C2; use super::{I2C1, I2C3}; use crate::gpio::*; @@ -523,15 +523,15 @@ mod stm32l4x3_pins { pins!(I2C1, 4, SCL: [PA9, PB6, PB8], SDA: [PA10, PB7, PB9]); - #[cfg(condition = "peripheral_i2c2")] + #[cfg(has_peripheral = "i2c2")] pins!(I2C2, 4, SCL: [PB10, PB13], SDA: [PB11, PB14]); pins!(I2C3, 4, SCL: [PA7, PC0], SDA: [PB4, PC1]); } -#[cfg(condition = "family_L4x5")] +#[cfg(family = "L4x5")] mod stm32l4x5_pins { - #[cfg(condition = "peripheral_i2c2")] + #[cfg(has_peripheral = "i2c2")] use super::I2C2; use super::{I2C1, I2C3}; use crate::gpio::*; @@ -539,17 +539,17 @@ mod stm32l4x5_pins { use gpioc::{PC0, PC1}; pins!(I2C1, 4, SCL: [PB6, PB8], SDA: [PB7, PB9]); - #[cfg(condition = "peripheral_i2c2")] + #[cfg(has_peripheral = "i2c2")] pins!(I2C2, 4, SCL: [PB10, PB13], SDA: [PB11, PB14]); pins!(I2C3, 4, SCL: [PC0], SDA: [PC1]); } -#[cfg(condition = "family_L4x6")] +#[cfg(family = "L4x6")] mod stm32l4x6_pins { - #[cfg(condition = "peripheral_i2c2")] + #[cfg(has_peripheral = "i2c2")] use super::I2C2; - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] use super::I2C4; use super::{I2C1, I2C3}; use crate::gpio::*; @@ -559,30 +559,30 @@ mod stm32l4x6_pins { use gpiob::PB4; use gpiob::{PB10, PB11, PB13, PB14, PB6, PB7, PB8, PB9}; use gpioc::{PC0, PC1}; - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] use gpiod::{PD12, PD13}; use gpiof::{PF0, PF1}; - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] use gpiof::{PF14, PF15}; use gpiog::{PG13, PG14, PG7, PG8}; pins!(I2C1, 4, SCL: [PB6, PB8], SDA: [PB7, PB9]); - #[cfg(condition = "peripheral_i2c2")] + #[cfg(has_peripheral = "i2c2")] pins!(I2C2, 4, SCL: [PB10, PB13, PF1], SDA: [PB11, PB14, PF0]); pins!(I2C3, 4, SCL: [PC0, PG7, PG14], SDA: [PC1, PG8, PG13]); #[cfg(any(feature = "stm32l496", feature = "stm32l4a6"))] pins!(I2C3, 4, SCL: [PA7], SDA: [PB4]); - #[cfg(condition = "peripheral_i2c4")] + #[cfg(has_peripheral = "i2c4")] pins!(I2C4, 4, SCL: [PD12, PF14], SDA: [PD13, PF15]); // These are present on STM32L496XX and STM32L4A6xG, but the // PAC does not have gpioh, so we can't actually these pins // Both not on STM32L486XX and STM32L476XX - // #[cfg(condition = "peripheral_i2c2")] + // #[cfg(has_peripheral = "i2c2")] // use gpioh::{PH4, PH5}; - // #[cfg(condition = "peripheral_i2c2")] + // #[cfg(has_peripheral = "i2c2")] // pins!(I2C2, AF4, SCL: [PH4], SDA: [PH5]); // use gpioh::{PH7, PH8}; // pins!(I2C3, AF4, SCL: [PH7], SDA: [PH8]); diff --git a/src/lib.rs b/src/lib.rs index 264908cb..a8e5e0e1 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -13,24 +13,24 @@ pub use embedded_hal as hal; pub use stm32l4; -#[cfg(condition = "family_L4x1")] +#[cfg(family = "L4x1")] pub use stm32l4::stm32l4x1 as pac; -#[cfg(condition = "family_L41_42")] +#[cfg(family = "L41_42")] pub use stm32l4::stm32l412 as pac; -#[cfg(all(condition = "family_L4x2", not(condition = "family_L41_42")))] +#[cfg(all(family = "L4x2", not(family = "L41_42")))] pub use stm32l4::stm32l4x2 as pac; -#[cfg(condition = "family_L4x3")] +#[cfg(family = "L4x3")] pub use stm32l4::stm32l4x3 as pac; -#[cfg(condition = "family_L4x5")] +#[cfg(family = "L4x5")] pub use stm32l4::stm32l4x5 as pac; -#[cfg(condition = "family_L4x6")] +#[cfg(family = "L4x6")] pub use stm32l4::stm32l4x6 as pac; -#[cfg(condition = "family_L4+x9")] +#[cfg(family = "L4+x9")] pub use stm32l4::stm32l4r9 as pac; #[cfg(feature = "rt")] @@ -41,58 +41,58 @@ pub use crate::pac as stm32; pub mod traits; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod adc; -#[cfg(not(any(condition = "family_L4+x9",)))] -#[cfg(condition = "peripheral_can1")] +#[cfg(not(any(family = "L4+x9",)))] +#[cfg(has_peripheral = "can1")] pub mod can; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod crc; pub mod datetime; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod delay; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod dma; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod flash; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod gpio; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod i2c; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod lptimer; -#[cfg(all(feature = "otg_fs", condition = "peripheral_usb_otg_fs"))] +#[cfg(all(feature = "otg_fs", has_peripheral = "usb_otg_fs"))] pub mod otg_fs; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod prelude; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod pwm; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod pwr; -#[cfg(not(any(condition = "family_L4+x9",)))] -#[cfg(condition = "peripheral_qspi")] +#[cfg(not(any(family = "L4+x9",)))] +#[cfg(has_peripheral = "qspi")] pub mod qspi; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod rcc; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod rng; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod rtc; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod serial; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod signature; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod spi; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod time; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod timer; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod tsc; -#[cfg(all(feature = "stm32-usbd", condition = "peripheral_usb_device_fs"))] +#[cfg(all(feature = "stm32-usbd", has_peripheral = "usb_device_fs"))] pub mod usb; -#[cfg(not(any(condition = "family_L4+x9",)))] +#[cfg(not(any(family = "L4+x9",)))] pub mod watchdog; mod sealed { diff --git a/src/qspi.rs b/src/qspi.rs index 689ea2a8..650fa177 100644 --- a/src/qspi.rs +++ b/src/qspi.rs @@ -6,13 +6,13 @@ use crate::gpio::{ gpioe::{PE10, PE11, PE12, PE13, PE14, PE15}, }; -#[cfg(not(condition = "family_L4x5"))] +#[cfg(not(family = "L4x5"))] use crate::gpio::{ gpioa::{PA2, PA3}, gpiod::{PD3, PD4, PD5, PD6, PD7}, }; -#[cfg(condition = "family_L4x6")] +#[cfg(family = "L4x6")] use crate::gpio::{ gpioc::{PC1, PC2, PC4, PC5}, gpiof::{PF6, PF7, PF8, PF9}, @@ -703,7 +703,7 @@ pins!( IO3: [PE15, PA6] ); -#[cfg(not(condition = "family_L4x5"))] +#[cfg(not(family = "L4x5"))] pins!( QUADSPI, 10, @@ -715,7 +715,7 @@ pins!( IO3: [PD7] ); -#[cfg(condition = "family_L4x6")] +#[cfg(family = "L4x6")] pins!( QUADSPI, 10, diff --git a/src/rcc/enable.rs b/src/rcc/enable.rs index cda4bbb5..477367b0 100644 --- a/src/rcc/enable.rs +++ b/src/rcc/enable.rs @@ -142,7 +142,7 @@ bus! { SAI1 => (APB2, sai1en, sai1smen, sai1rst), // 21 } -#[cfg(any(condition = "family_L4x5", condition = "family_L4x6"))] +#[cfg(any(family = "L4x5", family = "L4x6"))] bus! { GPIOF => (AHB2, gpiofen, gpiofsmen, gpiofrst), // 5 GPIOG => (AHB2, gpiogen, gpiogsmen, gpiogrst), // 6 @@ -160,64 +160,54 @@ bus! { SAI2 => (APB2, sai2en, sai2smen, sai2rst), // 22 } -#[cfg(any(condition = "family_L4x1", condition = "family_L4x2"))] +#[cfg(any(family = "L4x1", family = "L4x2"))] bus! { UART4 => (APB1R1, uart4en, uart4smen, usart4rst), // 19 // TODO: fix typo I2C4 => (APB1R2, i2c4en,, i2c4rst), // 1 // TODO: fix absent } -#[cfg(any( - condition = "family_L4x1", - condition = "family_L4x2", - condition = "family_L4x3", - condition = "family_L4x5" -))] +#[cfg(any(family = "L4x1", family = "L4x2", family = "L4x3", family = "L4x5"))] bus! { DAC1 => (APB1R1, dac1en, dac1smen, dac1rst), // 29 SDMMC => (APB2, sdmmcen, sdmmcsmen, sdmmcrst), // 10 } -#[cfg(not(condition = "family_L4x3"))] +#[cfg(not(family = "L4x3"))] bus! { ADC2 => (AHB2, adcen, adcfssmen, adcrst), // 13 QUADSPI => (AHB3, qspien, qspismen, qspirst), // 8 } -#[cfg(not(condition = "family_L4x5"))] +#[cfg(not(family = "L4x5"))] bus! { CRS => (APB1R1, crsen,,), // 24 // TODO: fix absent } -#[cfg(any(condition = "family_L4x1", condition = "family_L4x3"))] -#[cfg(condition = "peripheral_usb_device_fs")] +#[cfg(any(family = "L4x1", family = "L4x3"))] +#[cfg(has_peripheral = "usb_device_fs")] bus! { USB => (APB1R1, usbfsen, usbfssmen, usbfsrst), // 26 } -#[cfg(condition = "family_L4x1")] +#[cfg(family = "L4x1")] bus! { TIM3 => (APB1R1, tim3en,,), // 1 // TODO: absent smen, rst USB_FS => (APB1R1, usbf, usbfssmen, usbfsrst), // 26 // TODO: fix typo } -#[cfg(condition = "family_L4x2")] +#[cfg(family = "L4x2")] bus! { TIM3 => (APB1R1, tim3en,, tim3rst), // 1 // TODO: fix absent } -#[cfg(condition = "family_L4x5")] +#[cfg(family = "L4x5")] bus! { DFSDM => (APB2, dfsdmen, dfsdmsmen, dfsdmrst), // 24 } -#[cfg(any( - condition = "family_L4x6", - condition = "family_L4+x5", - condition = "family_L4+x7", - condition = "family_L4+x9" -))] +#[cfg(any(family = "L4x6", family = "L4+x5", family = "L4+x7", family = "L4+x9"))] bus! { DMA2D => (AHB1, dma2den, dma2dsmen, dma2drst), // 17 diff --git a/src/rtc.rs b/src/rtc.rs index 29a1d319..b02fea87 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -1,15 +1,15 @@ //! RTC peripheral abstraction /// refer to AN4759 to compare features of RTC2 and RTC3 -#[cfg(not(condition = "peripheral_rtc_type3"))] +#[cfg(not(has_peripheral = "rtc_type3"))] pub mod rtc2; -#[cfg(not(condition = "peripheral_rtc_type3"))] +#[cfg(not(has_peripheral = "rtc_type3"))] pub use rtc2 as rtc_registers; /// refer to AN4759 to compare features of RTC2 and RTC3 -#[cfg(condition = "peripheral_rtc_type3")] +#[cfg(has_peripheral = "rtc_type3")] pub mod rtc3; -#[cfg(condition = "peripheral_rtc_type3")] +#[cfg(has_peripheral = "rtc_type3")] pub use rtc3 as rtc_registers; use void::Void; diff --git a/src/rtc/rtc2.rs b/src/rtc/rtc2.rs index 11f5f9ee..7dacad19 100644 --- a/src/rtc/rtc2.rs +++ b/src/rtc/rtc2.rs @@ -75,15 +75,12 @@ pub fn is_alarm_b_accessible(rtc: &RTC) -> bool { // AN7459 // L4 series except L41/2 has 20 backup registers // L41/2, L4P/Q and L4R/S have 32 backup registers -pub const BACKUP_REGISTER_COUNT: usize = if cfg!(any( - condition = "family_L41_42", - condition = "family_L4P_4Q", - condition = "family_L4R_4S", -)) { - 32 -} else { - 20 -}; +pub const BACKUP_REGISTER_COUNT: usize = + if cfg!(any(family = "L41_42", family = "L4P_4Q", family = "L4R_4S",)) { + 32 + } else { + 20 + }; /// Read content of the backup register. /// diff --git a/src/serial.rs b/src/serial.rs index 68a6eef4..a81301d9 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -21,7 +21,7 @@ use crate::pac; use crate::rcc::{Clocks, Enable, RccBus, Reset}; use crate::time::{Bps, U32Ext}; -#[cfg(any(condition = "peripheral_uart4", condition = "peripheral_uart5",))] +#[cfg(any(has_peripheral = "uart4", has_peripheral = "uart5",))] use crate::dma::dma2; /// Interrupt event @@ -826,17 +826,17 @@ hal! { USART2: (usart2, pclk1, tx: (TxDma2, c7s, dma1::C7), rx: (RxDma2, c6s, dma1::C6)), } -#[cfg(condition = "peripheral_usart3")] +#[cfg(has_peripheral = "usart3")] hal! { USART3: (usart3, pclk1, tx: (TxDma3, c2s, dma1::C2), rx: (RxDma3, c3s, dma1::C3)), } -#[cfg(condition = "peripheral_uart4")] +#[cfg(has_peripheral = "uart4")] hal! { UART4: (uart4, pclk1, tx: (TxDma4, c3s, dma2::C3), rx: (RxDma4, c5s, dma2::C5)), } -#[cfg(condition = "peripheral_uart5")] +#[cfg(has_peripheral = "uart5")] hal! { UART5: (uart5, pclk1, tx: (TxDma5, c1s, dma2::C1), rx: (RxDma5, c2s, dma2::C2)), } @@ -973,7 +973,7 @@ impl_pin_traits! { } } -#[cfg(condition = "peripheral_uart4")] +#[cfg(has_peripheral = "uart4")] impl_pin_traits! { UART4: { 8: { @@ -985,7 +985,7 @@ impl_pin_traits! { } } -#[cfg(condition = "peripheral_uart5")] +#[cfg(has_peripheral = "uart5")] impl_pin_traits! { UART5: { 8: { diff --git a/src/signature.rs b/src/signature.rs index 2abce5f5..d8777cb4 100644 --- a/src/signature.rs +++ b/src/signature.rs @@ -119,11 +119,7 @@ impl VtempCalHigh { /// aka TS_CAL2_TEMP in reference manual /// Feature gate Required: this is 110 for L47x/L48x, 130 for other L4s according to /// https://github.com/STMicroelectronics/STM32CubeL4/blob/5e1553e07706491bd11f4edd304e093b6e4b83a4/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h#L352-L356 - pub const TEMP_DEGREES: u16 = if cfg!(condition = "family_L47_48") { - 110 - } else { - 130 - }; + pub const TEMP_DEGREES: u16 = if cfg!(family = "L47_48") { 110 } else { 130 }; /// Read calibration value pub fn read(&self) -> u16 { diff --git a/src/spi.rs b/src/spi.rs index 8ba1659c..5fdd31f0 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -9,7 +9,7 @@ use core::ptr; use core::sync::atomic; use core::sync::atomic::Ordering; -#[cfg(all(condition = "peripheral_spi3", not(condition = "family_L4x3")))] +#[cfg(all(has_peripheral = "spi3", not(family = "L4x3")))] use crate::dma::dma2; use crate::dma::{self, dma1, TransferPayload}; use crate::gpio::{Alternate, PushPull}; @@ -269,7 +269,7 @@ macro_rules! hal { } use crate::gpio::gpiod::*; -#[cfg(condition = "peripheral_gpiog")] +#[cfg(has_peripheral = "gpiog")] use crate::gpio::gpiog::*; use crate::gpio::{gpioa::*, gpiob::*, gpioc::*, gpioe::*}; @@ -283,24 +283,24 @@ pins!(SPI1, 5, MISO: [PA6, PB4, PE14], MOSI: [PA7, PB5, PE15]); -#[cfg(condition = "peripheral_gpiog")] +#[cfg(has_peripheral = "gpiog")] pins!(SPI1, 5, SCK: [PG2], MISO: [PG3], MOSI: [PG4]); -#[cfg(condition = "peripheral_spi3")] +#[cfg(has_peripheral = "spi3")] use crate::stm32::SPI3; -#[cfg(condition = "peripheral_spi3")] +#[cfg(has_peripheral = "spi3")] hal! { SPI3: (spi3, spi3_slave, pclk1), } -#[cfg(all(condition = "peripheral_spi3", not(condition = "family_L4x3")))] +#[cfg(all(has_peripheral = "spi3", not(family = "L4x3")))] pins!(SPI3, 6, SCK: [PB3, PC10], MISO: [PB4, PC11], MOSI: [PB5, PC12]); -#[cfg(all(condition = "peripheral_spi3", condition = "peripheral_gpiog"))] +#[cfg(all(has_peripheral = "spi3", has_peripheral = "gpiog"))] pins!(SPI3, 6, SCK: [PG9], MISO: [PG10], MOSI: [PG11]); use crate::stm32::SPI2; @@ -721,8 +721,8 @@ macro_rules! spi_dma { } spi_dma!(SPI1, dma1::C2, c2s, map1, dma1::C3, c3s, map1); -#[cfg(not(condition = "family_L4x2"))] +#[cfg(not(family = "L4x2"))] spi_dma!(SPI2, dma1::C4, c4s, map1, dma1::C5, c5s, map1); // spi_dma!(SPI1, dma2::C3, c3s, map4, dma2::C4, c4s, map4); -#[cfg(all(condition = "peripheral_spi3", not(condition = "family_L4x3")))] +#[cfg(all(has_peripheral = "spi3", not(family = "L4x3")))] spi_dma!(SPI3, dma2::C1, c1s, map3, dma2::C2, c2s, map3); diff --git a/src/timer.rs b/src/timer.rs index f7e4c982..eb7f353f 100644 --- a/src/timer.rs +++ b/src/timer.rs @@ -2,13 +2,13 @@ use crate::hal::timer::{CountDown, Periodic}; -#[cfg(condition = "peripheral_tim3")] +#[cfg(has_peripheral = "tim3")] use crate::stm32::TIM3; -#[cfg(condition = "peripheral_tim7")] +#[cfg(has_peripheral = "tim7")] use crate::stm32::TIM7; use crate::stm32::{TIM15, TIM16, TIM2, TIM6}; -#[cfg(condition = "peripheral_tim17")] +#[cfg(has_peripheral = "tim17")] use crate::stm32::{TIM17, TIM4, TIM5}; // TIM1/TIM8 ("Advcanced Control Timers") -> no impl @@ -229,27 +229,27 @@ hal! { TIM16: (tim16, free_running_tim16, APB2, u16), } -#[cfg(condition = "peripheral_tim3")] +#[cfg(has_peripheral = "tim3")] hal! { TIM3: (tim3, free_running_tim3, APB1R1, u16), } -#[cfg(condition = "peripheral_tim7")] +#[cfg(has_peripheral = "tim7")] hal! { TIM7: (tim7, free_running_tim7, APB1R1, u16), } -#[cfg(condition = "peripheral_tim4")] +#[cfg(has_peripheral = "tim4")] hal! { TIM4: (tim4, free_running_tim4, APB1R1, u16), } -#[cfg(condition = "peripheral_tim5")] +#[cfg(has_peripheral = "tim5")] hal! { TIM5: (tim5, free_running_tim5, APB1R1, u32), } -#[cfg(condition = "peripheral_tim17")] +#[cfg(has_peripheral = "tim17")] hal! { TIM17: (tim17, free_running_tim17, APB2, u16), } diff --git a/src/watchdog.rs b/src/watchdog.rs index f08db6e7..93670741 100644 --- a/src/watchdog.rs +++ b/src/watchdog.rs @@ -27,17 +27,9 @@ impl IndependentWatchdog { /// Debug independent watchdog stopped when core is halted pub fn stop_on_debug(&self, dbgmcu: &DBGMCU, stop: bool) { - #[cfg(any( - condition = "family_L4x1", - condition = "family_L4x2", - condition = "family_L4x3", - ))] + #[cfg(any(family = "L4x1", family = "L4x2", family = "L4x3",))] dbgmcu.apb1fzr1.modify(|_, w| w.dbg_iwdg_stop().bit(stop)); - #[cfg(not(any( - condition = "family_L4x1", - condition = "family_L4x2", - condition = "family_L4x3", - )))] + #[cfg(not(any(family = "L4x1", family = "L4x2", family = "L4x3",)))] dbgmcu.apb1_fzr1.modify(|_, w| w.dbg_iwdg_stop().bit(stop)); } From 7731dc93fff1e155a1eb5c406a9db0252e8dc65a Mon Sep 17 00:00:00 2001 From: JC <8765278+Crzyrndm@users.noreply.github.com> Date: Wed, 9 Feb 2022 14:07:54 +1300 Subject: [PATCH 34/34] rtc type is now seperated from peripheral presense --- src/rtc.rs | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/rtc.rs b/src/rtc.rs index b02fea87..011aaca0 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -1,15 +1,15 @@ //! RTC peripheral abstraction /// refer to AN4759 to compare features of RTC2 and RTC3 -#[cfg(not(has_peripheral = "rtc_type3"))] +#[cfg(has_peripheral_variant = "rtc_type2")] pub mod rtc2; -#[cfg(not(has_peripheral = "rtc_type3"))] +#[cfg(has_peripheral_variant = "rtc_type2")] pub use rtc2 as rtc_registers; /// refer to AN4759 to compare features of RTC2 and RTC3 -#[cfg(has_peripheral = "rtc_type3")] +#[cfg(has_peripheral_variant = "rtc_type3")] pub mod rtc3; -#[cfg(has_peripheral = "rtc_type3")] +#[cfg(has_peripheral_variant = "rtc_type3")] pub use rtc3 as rtc_registers; use void::Void;