create main branch from next branch

Xilinx · Oct 24, 2022 · a60e1df · a60e1df
1 parent a3d248b
commit a60e1df
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/Jenkinsfile b/Jenkinsfile
@@ -1,2 +1,2 @@
 @Library('pipeline-library')_
-FullVitisLibPipeline (branch: 'next', libname: 'Vitis_Libraries', TARGETS: 'hls_csim:hls_csynth:hls_cosim:vivado_syn:vitis_sw_emu:vitis_hw_emu:vitis_hw_build:vitis_aie_sim:vitis_aie_x86sim', TOOLVERSION: '2022.2_stable_latest')
+FullVitisLibPipeline (branch: 'main', libname: 'Vitis_Libraries', TARGETS: 'hls_csim:hls_csynth:hls_cosim:vivado_syn:vitis_sw_emu:vitis_hw_emu:vitis_hw_build:vitis_aie_sim:vitis_aie_x86sim', TOOLVERSION: '2022.2_released')