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Full FPGA Implementation of 32-bit FSM-based Multi-State MIPS Processor

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mips-processor-basys3

Team ALUminati - ES215 Computer Organization and Architecture

The processor is implemented on the Basys3 FPGA board. The datapath has been modified carefully to expand the ISA - allowing recursive programs to run as well.

Check out the final report here and the final presentation here, it includes video demonstrations as well.

Some MIPS assembly codes are available in the codes directory. The utils directory contains a Python script to convert human-readable MIPS assembly code to machine code.

In the utils directory, write your human-readable MIPS assembly code in mips_instructions.txt run coe_generator.py:

python3 ./utils/coe_generator.py

data.coe will be ready to be used in the FPGA and even the 32-bit machine code will be available in mips_machine_code.txt.

Versions of the Processor

mips_v3.2 is the stable and FPGA-implementation ready version of the MIPS processor.

Modified Datapath

The FSM

The Complete ISA

BRAM

ALU

Factorial Waveform

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Full FPGA Implementation of 32-bit FSM-based Multi-State MIPS Processor

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