·
15 commits
to main
since this release
What's Changed
- [RTG] Populate pipeline with new passes by @maerhart in #8139
- [RTG] Add label visibility API by @maerhart in #8140
- [RTGTest] Add integer register type API by @maerhart in #8141
- [RTGTest] Add the last remaining ops for RV32I by @maerhart in #8142
- [HW] Add array_concat of one element folder by @maerhart in #8181
- [MooreToCore] Convert SCF ops inside llhd.process to CF by @maerhart in #8175
- [MooreToCore] Don't insert wait event checks if all detects are AnyChange by @maerhart in #8178
- [MooreToCore] Properly handle OOB accesses of moore.extract by @maerhart in #8182
- [NFC][Verif] Clarify
symbolic_value
semantics by @TaoBi22 in #8177 - [circt-verilog] Fix negative Rest timing by @maerhart in #8174
- [circt-verilog] Add LLHD lowering pipeline by @maerhart in #8179
- [MooreToCore] Branch to resume block instead of wait block by @maerhart in #8184
- [CombToAIG] Add support for div/mod operations by @uenoku in #8130
- [ESI Runtime] Pluggable channel engines by @teqdruid in #8167
- [MooreToCore] Add nested moore.conditional support by @AndreyVV-100 in #8125
- [LLHD] Removing llhd-sim tests by @teqdruid in #8036
- [RTG] Custom parser/printer for sequence op and type for sequence families by @maerhart in #8146
- [RTG] Separate operation for sequence randomization and randomized sequence type by @maerhart in #8147
- [RTG] Support partial sequence substitutions by @maerhart in #8148
- [RTG] Add operation to get a random number within a range by @maerhart in #8149
- [FIRRTL] FART: allow modules to be in multiple domains at once by @youngar in #8172
- [ESI][BSP] Service implementation via selectable engine by @teqdruid in #8186
- [FIRRTL] Disallow reading from property ports by @youngar in #8191
- [ImportVerilog] Fix bit slicing into variables declared with offset by @maerhart in #8190
- [FIRRTL] Add require and ensure intrinsics by @fabianschuiki in #8154
- [LLHD][TCM] Ignore processes with CFG loops within a TR by @maerhart in #8196
- [FIRRTL] Add contract declaration by @fabianschuiki in #8156
- [FIRRTL] Fix hasDontTouch crash on non-module block args by @fabianschuiki in #8157
- [FIRRTL][IMDCE] Support operations with blocks by @fabianschuiki in #8158
- [ImportVerilog]Support real math functions. by @hailongSun2000 in #8192
- [ESI][BSP] Emit engine records by @teqdruid in #8204
- [ESI][Runtime] Throw unknown engine error lazily by @teqdruid in #8205
- [FIRRTL] Add optional yaml parameter to view intrinsic, op by @dtzSiFive in #8203
Full Changelog: firtool-1.104.0...firtool-1.105.0