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Handle inheritance of <debug> element attributes #233

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Feb 21, 2025
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72 changes: 35 additions & 37 deletions rust/cmsis-pack/src/pdsc/device.rs
Original file line number Diff line number Diff line change
Expand Up @@ -167,34 +167,18 @@ impl ProcessorBuilder {
let name = self.name.clone();

let map = (0..units)
.into_iter()
.map(|unit| {
let default = Debug {
ap: AccessPort::Index(0),
dp: 0,
address: None,
svd: None,
name: name.clone(),
unit: None,
default_reset_sequence: None,
};
let Debug {
ap,
dp,
address,
svd,
name,
default_reset_sequence,
..
} = debugs
.iter()
.find(|debug| {
// If the <debug> element has a specific unit attribute we compare by that as well.
// If not we just compare the name.
let unit_condition = debug.unit.map(|u| u == unit).unwrap_or(true);
debug.name == name && unit_condition
})
.unwrap_or_else(|| &default);
// The attributes we're interested in may be spread across multiple debug
// attributes defined in the family, subfamily, or device; and which may or may not
// be specific to a given Pname or Punit.
//
// We'll prioritize the first element with the attribute we're interested in, since
// family and subfamily debug elements are appended after device debug elements.
let debugs_iterator = debugs.iter().filter(|debug| {
// If Pname or Punit are present on the <debug> element, they must match.
debug.name.as_ref().is_none_or(|n| Some(n) == name.as_ref())
&& debug.unit.is_none_or(|u| u == unit)
});

Ok(Processor {
core: self
Expand All @@ -203,13 +187,21 @@ impl ProcessorBuilder {
.ok_or_else(|| format_err!("No Core found!"))?,
fpu: self.fpu.clone().unwrap_or(FPU::None),
mpu: self.mpu.clone().unwrap_or(MPU::NotPresent),
dp: *dp,
ap: *ap,
address: *address,
svd: svd.clone(),
dp: debugs_iterator
.clone()
.find_map(|d| d.dp)
.unwrap_or_default(),
ap: debugs_iterator
.clone()
.find_map(|d| d.ap)
.unwrap_or_default(),
address: debugs_iterator.clone().find_map(|d| d.address),
svd: debugs_iterator.clone().find_map(|d| d.svd.clone()),
name: name.clone(),
unit,
default_reset_sequence: default_reset_sequence.clone(),
default_reset_sequence: debugs_iterator
.clone()
.find_map(|d| d.default_reset_sequence.clone()),
})
})
.collect::<Result<Vec<_>, _>>();
Expand Down Expand Up @@ -278,8 +270,8 @@ impl Default for AccessPort {
}
#[derive(Debug, Clone, Deserialize, Serialize)]
pub struct Debug {
pub dp: u8,
pub ap: AccessPort,
pub dp: Option<u8>,
pub ap: Option<AccessPort>,
pub address: Option<u32>,
pub svd: Option<String>,
pub name: Option<String>,
Expand All @@ -301,8 +293,8 @@ struct DebugBuilder {
impl DebugBuilder {
fn build(self) -> Debug {
Debug {
dp: self.dp.unwrap_or_default(),
ap: self.ap.unwrap_or_default(),
dp: self.dp,
ap: self.ap,
address: self.address,
svd: self.svd,
name: self.name,
Expand Down Expand Up @@ -334,7 +326,7 @@ impl DebugBuilder {
),
"accessportV2" => (
attr_parse(ap, "__dp").ok(),
attr_parse(ap, "address").ok().map(AccessPort::Address),
attr_parse_hex(ap, "address").ok().map(AccessPort::Address),
),
_ => unreachable!(),
}
Expand Down Expand Up @@ -795,6 +787,12 @@ fn parse_family(e: &Element) -> Result<Vec<Device>, Error> {
.map(|prc| family_device.add_processor(prc));
Vec::new()
}
"debug" => {
DebugsBuilder::from_elem_and_parent(child, e)
.ok_warn()
.map(|debug| family_device.add_debug(debug));
Vec::new()
}
_ => Vec::new(),
})
.collect::<Vec<_>>();
Expand Down
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