A flappy bird game psuedo-clone in VHDL.
Designed to run on a Cyclone III FPGA on the Altera DE0 development board.
To program, run Quartus II 13.0, compile the design, and program onto the board using the JTAG interface.
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A flappy bird game psuedo-clone in VHDL, with an added health bar.
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sherjeelshehzad/FlappyBirdVHDL
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A flappy bird game psuedo-clone in VHDL, with an added health bar.
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