ESP32-S3 APP_CPU flash support #82781
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Create the cache memory node instead of hardcoding addresses. Signed-off-by: Marek Matej <[email protected]>
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Update to support APP_CPU flash access. - fix the map_rom_segment so it can be used in other context - add IROM and DROM region size in Kconfig - update the memory.h by using dts records - fix the appcpu ld file to support flash Signed-off-by: Marek Matej <[email protected]>
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Should this be defined in DTS?
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Not really, current dts is not very good for making memory layouts, so I prefer this way of splitting the memory
| #else | ||
| cache_hal_disable(CACHE_TYPE_ALL); | ||
| #endif /* CONFIG_SOC_SERIES_ESP32 */ | ||
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| /* Clear the MMU entries that are already set up, | ||
| * so the new app only has the mappings it creates. | ||
| */ | ||
| mmu_hal_unmap_all(); | ||
| if (core == 0) { |
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We are only building this file for core==0, right?
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that is true, however it is called 2nd time when creating maps for the APP_CPU.
| @@ -68,28 +72,32 @@ | |||
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| #define HDR_ATTR __attribute__((section(".entry_addr"))) __attribute__((used)) | |||
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| #if !defined(CONFIG_SOC_ESP32_APPCPU) && !defined(CONFIG_SOC_ESP32S3_APPCPU) | |||
| #define PART_OFFSET FIXED_PARTITION_OFFSET(slot0_partition) | |||
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Does it make sense to use APPCPU_SLOT_OFFSET instead of PART_OFFSET?
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Anyway, not blocking at all.
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no it doesn't, the code is used in both cases PRO_CPU and APP_CPU
This PR enables flash support for
APP_CPUtarget on ESP32-S3 chip.