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[AIE2P] Introduce 32-bit spill pseudos for better code reuse
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@niwinanto
niwinanto committed Jan 27, 2025
1 parent b3b45cd commit 24e4e16
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Showing 19 changed files with 76 additions and 96 deletions.
16 changes: 10 additions & 6 deletions llvm/lib/Target/AIE/aie2p/AIE2PInstrInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -748,7 +748,7 @@ Register AIE2PInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
switch (MI.getOpcode()) {
default:
return 0;
case AIE2P::LDA_dms_lda_spill:
case AIE2P::LDA_R_SPILL:
case AIE2P::LDA_dmv_lda_q_spill:
case AIE2P::VLDA_128_dmv_lda_w_spill:
case AIE2P::VLDA_dmw_lda_w_spill:
Expand Down Expand Up @@ -779,7 +779,7 @@ Register AIE2PInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
switch (MI.getOpcode()) {
default:
return 0;
case AIE2P::ST_dms_sts_spill:
case AIE2P::ST_R_SPILL:
case AIE2P::ST_dmv_sts_q_spill:
case AIE2P::VST_128_dmv_sts_w_spill:
case AIE2P::VST_dmw_sts_w_spill:
Expand Down Expand Up @@ -831,7 +831,7 @@ void AIE2PInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
LLVM_DEBUG(dbgs() << "Attempting to Store: " << SrcReg << " To " << FI
<< "\n");
if (regClassMatches(AIE2P::mSclStRegClass, RC, SrcReg)) {
Opcode = AIE2P::ST_dms_sts_spill;
Opcode = AIE2P::ST_R_SPILL;
} else if (regClassMatches(AIE2P::mQQssRegClass, RC, SrcReg)) {
Opcode = AIE2P::ST_dmv_sts_q_spill;
} else if (regClassMatches(AIE2P::mWsRegClass, RC, SrcReg)) {
Expand Down Expand Up @@ -872,7 +872,7 @@ void AIE2PInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
Register ScratchReg = MRI.createVirtualRegister(&AIE2P::eRRegClass);
BuildMI(MBB, I, DL, get(AIE2P::MOV_alu_mv_mv_mv_scl), ScratchReg)
.addReg(SrcReg, getKillRegState(IsKill));
Opcode = AIE2P::ST_dms_sts_spill;
Opcode = AIE2P::ST_R_SPILL;
SrcReg = ScratchReg;
IsKill = true;
} else {
Expand Down Expand Up @@ -915,7 +915,7 @@ void AIE2PInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
};
RC = constrainRegClass(MBB.getParent()->getRegInfo(), RC, DstReg);
if (regClassMatches(AIE2P::mLdaSclRegClass, RC, DstReg)) {
Opcode = AIE2P::LDA_dms_lda_spill;
Opcode = AIE2P::LDA_R_SPILL;
} else if (regClassMatches(AIE2P::mQQssRegClass, RC, DstReg)) {
Opcode = AIE2P::LDA_dmv_lda_q_spill;
} else if (regClassMatches(AIE2P::mWsRegClass, RC, DstReg)) {
Expand Down Expand Up @@ -952,7 +952,7 @@ void AIE2PInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
// Can't spill these directly. Need to bounce through a GPR.
MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
Register Reg = MRI.createVirtualRegister(&AIE2P::eRRegClass);
BuildMI(MBB, I, DL, get(AIE2P::LDA_dms_lda_spill), Reg)
BuildMI(MBB, I, DL, get(AIE2P::LDA_R_SPILL), Reg)
.addFrameIndex(FI)
.addMemOperand(CreateMMO(FI));
BuildMI(MBB, I, DL, get(AIE2P::MOV_alu_mv_mv_mv_scl), DstReg)
Expand All @@ -979,6 +979,8 @@ AIE2PInstrInfo::getSpillPseudoExpandInfo(const MachineInstr &MI) const {
return {};

switch (MI.getOpcode()) {
case AIE2P::ST_R_SPILL:
return {{AIE2P::ST_dms_sts_spill, AIE2P::NoSubRegister, 4}};
case AIE2P::VST_L_SPILL:
return {{AIE2P::ST_dms_sts_spill, AIE2P::sub_l_even},
{AIE2P::ST_dms_sts_spill, AIE2P::sub_l_odd}};
Expand Down Expand Up @@ -1014,6 +1016,8 @@ AIE2PInstrInfo::getSpillPseudoExpandInfo(const MachineInstr &MI) const {
{AIE2P::ST_dms_sts_spill, AIE2P::sub_hi_dim_then_sub_dim_stride},
{AIE2P::ST_dms_sts_spill, AIE2P::sub_hi_dim_then_sub_dim_count}};

case AIE2P::LDA_R_SPILL:
return {{AIE2P::LDA_dms_lda_spill, AIE2P::NoSubRegister, 4}};
case AIE2P::VLDA_L_SPILL:
return {{AIE2P::LDA_dms_lda_spill, AIE2P::sub_l_even},
{AIE2P::LDA_dms_lda_spill, AIE2P::sub_l_odd}};
Expand Down
7 changes: 7 additions & 0 deletions llvm/lib/Target/AIE/aie2p/AIE2PInstrInfo.td
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Original file line number Diff line number Diff line change
Expand Up @@ -145,6 +145,12 @@ foreach instr = [PADDA_3D, PADDB_3D, PADDS_3D] in

let hasSideEffects = 0, Uses = [sp] in {
let mayLoad = false, mayStore = true in {
// Although it is ideal to avoid the use of ST_R_SPILL and LDA_R_SPILL,
// these instructions are included to simplify handling in certain
// scenarios. For example, they help eliminate the need for custom handling
// in places like eliminateFrameIndex. By including these instructions, we
// can streamline the code and improve readability.
def ST_R_SPILL : Pseudo<(outs ), (ins OP_mSclSt:$src, c12n_step4:$imm), "vst_r_spill", "$src, [sp, $imm]">;
def VST_L_SPILL : Pseudo<(outs ), (ins eL:$src, c12n_step4:$imm), "vst_l_spill", "$src, [sp, $imm]">;
def VST_Y_SPILL : Pseudo<(outs ), (ins VEC1024:$src, c16n_step64:$imm), "vst_y_spill", "${src}, [sp, $imm]">;
def VST_CM_SPILL : Pseudo<(outs ), (ins ACC1024:$src, c16n_step64:$imm), "vst_cm_spill", "${src}, [sp, $imm]">;
Expand All @@ -156,6 +162,7 @@ def VST_PLFR_SPILL : Pseudo<(outs ), (ins ePSRFLdF:$src, c16n_step64:$imm), "vst
}

let mayLoad = true, mayStore = false in {
def LDA_R_SPILL : Pseudo<(outs OP_mLdaScl:$dst), (ins c12n_step4:$imm), "vlda_r_spill", "$dst, [sp, $imm]">;
def VLDA_L_SPILL : Pseudo<(outs eL:$dst), (ins c12n_step4:$imm), "vlda_l_spill", "$dst, [sp, $imm]">;
def VLDA_Y_SPILL : Pseudo<(outs VEC1024:$dst), (ins c16n_step64:$imm), "vlda_y_spill", "${dst}, [sp, $imm]">;
def VLDA_CM_SPILL : Pseudo<(outs ACC1024:$dst), (ins c16n_step64:$imm), "vlda_cm_spill", "${dst}, [sp, $imm]">;
Expand Down
35 changes: 2 additions & 33 deletions llvm/lib/Target/AIE/aie2p/AIE2PRegisterInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -161,39 +161,6 @@ bool AIE2PRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,

// Note that LDB path does not support SPILL instructions

case AIE2P::LDA_dms_lda_spill:
case AIE2P::ST_dms_sts_spill: {
if (isEncodableAsNegativeInt<9, 4>(Offset)) {
MI.getOperand(FIOperandNum).ChangeToImmediate(Offset);
} else {
// TODO: May be we should consider creating PSEUDO instructions for real
// spill instructions, then special handling like here not needed anymore.
Register OffsetReg =
MF.getRegInfo().createVirtualRegister(&AIE2P::eDJRegClass);
Register SPReg =
MF.getRegInfo().createVirtualRegister(&AIE2P::ePRegClass);

BuildMI(MBB, II, DL, TII->get(AIE2P::MOVXM), OffsetReg).addImm(Offset);
BuildMI(MBB, II, DL, TII->get(TII->getMvSclOpcode()), SPReg)
.addReg(getStackPointerRegister());

if (Opc == AIE2P::LDA_dms_lda_spill) {
auto LoadMI = BuildMI(MBB, II, DL, TII->get(AIE2P::LDA_dms_lda_idx))
.addDef(MI.getOperand(0).getReg())
.addReg(SPReg)
.addReg(OffsetReg);
LoadMI.cloneMemRefs(MI);
} else {
auto StoreMI = BuildMI(MBB, II, DL, TII->get(AIE2P::ST_dms_sts_idx))
.addReg(MI.getOperand(0).getReg())
.addReg(SPReg)
.addReg(OffsetReg);
StoreMI.cloneMemRefs(MI);
}
II->removeFromParent();
}
return false;
}
case AIE2P::LDA_dmv_lda_q_spill:
case AIE2P::VLDA_128_dmv_lda_w_spill:
case AIE2P::VLDA_dmw_lda_w_spill:
Expand All @@ -208,6 +175,8 @@ bool AIE2PRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
case AIE2P::VST_dmx_sts_x_spill:
MI.getOperand(FIOperandNum).ChangeToImmediate(Offset);
return false;
case AIE2P::LDA_R_SPILL:
case AIE2P::ST_R_SPILL:
case AIE2P::VLDA_L_SPILL:
case AIE2P::VST_L_SPILL:
case AIE2P::LDA_D_SPILL:
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/AIE/GlobalISel/legalize-dyn-stackalloc.ll
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Expand Up @@ -310,14 +310,14 @@ define void @test_huge_stack(i32 noundef %n) #0 {
; AIE2P-NEXT: mov p0, sp
; AIE2P-NEXT: mov p1, sp
; AIE2P-NEXT: st lr, [p0, dj0] // 4-byte Folded Spill
; AIE2P-NEXT: movxm dj0, #-40056
; AIE2P-NEXT: mov p0, sp
; AIE2P-NEXT: movxm dj0, #-40056
; AIE2P-NEXT: st r8, [p0, dj0] // 4-byte Folded Spill
; AIE2P-NEXT: movxm dj0, #-40060
; AIE2P-NEXT: mov p0, sp
; AIE2P-NEXT: movxm dj0, #-40060
; AIE2P-NEXT: st p6, [p0, dj0] // 4-byte Folded Spill
; AIE2P-NEXT: movxm dj0, #-40064
; AIE2P-NEXT: mov p0, sp
; AIE2P-NEXT: movxm dj0, #-40064
; AIE2P-NEXT: st p7, [p0, dj0] // 4-byte Folded Spill
; AIE2P-NEXT: mov p7, sp
; AIE2P-NEXT: padda [p7], m0
Expand Down Expand Up @@ -366,11 +366,11 @@ define void @test_huge_stack(i32 noundef %n) #0 {
; AIE2P-NEXT: mov sp, p7
; AIE2P-NEXT: mov p0, sp
; AIE2P-NEXT: lda p7, [p0, dj0] // 4-byte Folded Reload
; AIE2P-NEXT: movxm dj0, #-40060
; AIE2P-NEXT: mov p0, sp
; AIE2P-NEXT: movxm dj0, #-40060
; AIE2P-NEXT: lda p6, [p0, dj0] // 4-byte Folded Reload
; AIE2P-NEXT: movxm dj0, #-40056
; AIE2P-NEXT: mov p0, sp
; AIE2P-NEXT: movxm dj0, #-40056
; AIE2P-NEXT: lda r8, [p0, dj0] // 4-byte Folded Reload
; AIE2P-NEXT: mov p0, sp
; AIE2P-NEXT: movxm dj0, #-40052
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/AIE/aie2p/eliminate-frame-index.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -22,8 +22,8 @@ body: |
; CHECK: frame-setup PADDXM_pstm_sp_imm 64, implicit-def $sp, implicit $sp
; CHECK-NEXT: $r2 = LDA_dms_lda_spill -60, implicit $sp
; CHECK-NEXT: ST_dms_sts_spill $r2, -60, implicit $sp
$r2 = LDA_dms_lda_spill %stack.1, implicit $sp
ST_dms_sts_spill $r2, %stack.1, implicit $sp
$r2 = LDA_R_SPILL %stack.1, implicit $sp
ST_R_SPILL $r2, %stack.1, implicit $sp
...

---
Expand Down Expand Up @@ -261,15 +261,15 @@ body: |
bb.0.entry:
; CHECK-LABEL: name: test_scl_big_offset
; CHECK: frame-setup PADDXM_pstm_sp_imm 2240, implicit-def $sp, implicit $sp
; CHECK-NEXT: $dj0 = MOVXM -2240
; CHECK-NEXT: $p0 = MOV_alu_mv_mv_mv_scl $sp
; CHECK-NEXT: ST_dms_sts_idx $lr, killed $p0, killed $dj0 :: (store (s32) into %stack.1)
; CHECK-NEXT: $dj0 = MOVXM -2240
; CHECK-NEXT: ST_dms_sts_idx killed $lr, killed $p0, killed $dj0 :: (store (s32) into %stack.1)
; CHECK-NEXT: $p0 = MOV_alu_mv_mv_mv_scl $sp
; CHECK-NEXT: $m0 = MOVXM -2224
; CHECK-NEXT: $p0 = PADD_mod_pseudo $p0, killed $m0
; CHECK-NEXT: PseudoJL 10, csr_aie2p, implicit-def $lr, implicit $p0
; CHECK-NEXT: $dj0 = MOVXM -2240
; CHECK-NEXT: $p0 = MOV_alu_mv_mv_mv_scl $sp
; CHECK-NEXT: $dj0 = MOVXM -2240
; CHECK-NEXT: $lr = LDA_dms_lda_idx killed $p0, killed $dj0 :: (load (s32) from %stack.1)
; CHECK-NEXT: frame-destroy PADDXM_pstm_sp_imm -2240, implicit-def $sp, implicit $sp
; CHECK-NEXT: PseudoRET implicit $lr
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AIE/aie2p/spill/spill-dcreg.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@ body: |
; CHECK-LABEL: name: test
; CHECK: liveins: $dc5
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ST_dms_sts_spill $dc5, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL $dc5, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: PseudoJL 32, csr_aie2p, implicit-def $lr
; CHECK-NEXT: $dc5 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: $dc5 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $dc5
%0:edc = COPY $dc5
PseudoJL 32, csr_aie2p, implicit-def $lr
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AIE/aie2p/spill/spill-djreg.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@ body: |
; CHECK-LABEL: name: test
; CHECK: liveins: $dj4
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ST_dms_sts_spill $dj4, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL $dj4, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: PseudoJL 32, csr_aie2p, implicit-def $lr
; CHECK-NEXT: $dj4 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: $dj4 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $dj4
%0:edj = COPY $dj4
PseudoJL 32, csr_aie2p, implicit-def $lr
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AIE/aie2p/spill/spill-dnreg.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@ body: |
; CHECK-LABEL: name: test
; CHECK: liveins: $dn4
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ST_dms_sts_spill $dn4, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL $dn4, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: PseudoJL 32, csr_aie2p, implicit-def $lr
; CHECK-NEXT: $dn4 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: $dn4 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $dn4
%0:edn = COPY $dn4
PseudoJL 32, csr_aie2p, implicit-def $lr
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AIE/aie2p/spill/spill-mreg.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@ body: |
; CHECK-LABEL: name: test
; CHECK: liveins: $m3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ST_dms_sts_spill $m3, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL $m3, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: PseudoJL 32, csr_aie2p, implicit-def $lr
; CHECK-NEXT: $m3 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: $m3 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $m3
%0:em = COPY $m3
PseudoJL 32, csr_aie2p, implicit-def $lr
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AIE/aie2p/spill/spill-reload-dj-high-gpr-pressure.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -54,10 +54,10 @@
; CHECK-LABEL: name: spill_to_mem
; CHECK: liveins: $dj0, $dj1, $dj2, $dj3, $dj4, $dj5, $dj6, $dj7, $dn0, $dn1, $dn2, $dn3, $dn4, $dn5, $dn6, $dn7, $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ST_dms_sts_spill $dj0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL $dj0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: $dj0 = COPY $dj1
; CHECK-NEXT: ST_dms_sts_idx_imm $dj0, $p0, 0, implicit $dj1, implicit $dj2, implicit $dj3, implicit $dj4, implicit $dj5, implicit $dj6, implicit $dj7, implicit $dn0, implicit $dn1, implicit $dn2, implicit $dn3, implicit $dn4, implicit $dn5, implicit $dn6, implicit $dn7
; CHECK-NEXT: renamable $dj0 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $dj0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: ST_dms_sts_idx $r0, $p0, killed renamable $dj0
%0:edj = COPY $dj0 ; -> only $dj0 is available
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AIE/aie2p/spill/spill-reload-m-high-gpr-pressure.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -54,10 +54,10 @@
; CHECK-LABEL: name: spill_to_mem
; CHECK: liveins: $dn0, $dn1, $dn2, $dn3, $dn4, $dn5, $dn6, $dn7, $m0, $m1, $m2, $m3, $m4, $m5, $m6, $m7, $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ST_dms_sts_spill $m0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL $m0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: $m0 = COPY $m1
; CHECK-NEXT: ST_dms_sts_idx_imm $m0, $p0, 0, implicit $m1, implicit $m2, implicit $m3, implicit $m4, implicit $m5, implicit $m6, implicit $m7, implicit $dn0, implicit $dn1, implicit $dn2, implicit $dn3, implicit $dn4, implicit $dn5, implicit $dn6, implicit $dn7
; CHECK-NEXT: renamable $m0 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $m0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: $p0 = PADDA_pstm_nrm $p0, killed renamable $m0
%0:em = COPY $m0 ; -> only $m0 is available
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/AIE/aie2p/spill/spill-reload-m.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -26,10 +26,10 @@
; CHECK-LABEL: name: spill_to_mem
; CHECK: liveins: $m0, $m1, $m2, $m3, $m4, $m5, $m6, $m7, $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ST_dms_sts_spill $m0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL $m0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: $m0 = COPY $m1
; CHECK-NEXT: ST_dms_sts_idx_imm $m0, $p0, 0, implicit $m1, implicit $m2, implicit $m3, implicit $m4, implicit $m5, implicit $m6, implicit $m7
; CHECK-NEXT: renamable $m0 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $m0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $m0
%0:em = COPY $m0 ; -> only $m0 is available
Expand Down Expand Up @@ -57,10 +57,10 @@
; CHECK: liveins: $m1, $m2, $m3, $m4, $m5, $m6, $m7, $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $m0 = LDA_dms_lda_idx_imm $p0, 0
; CHECK-NEXT: ST_dms_sts_spill killed renamable $m0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL killed renamable $m0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: $m0 = COPY $m1
; CHECK-NEXT: ST_dms_sts_idx_imm $m0, $p0, 0, implicit $m1, implicit $m2, implicit $m3, implicit $m4, implicit $m5, implicit $m6, implicit $m7
; CHECK-NEXT: renamable $m0 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $m0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: ST_dms_sts_idx_imm killed renamable $m0, $p0, 4
%0:em_as_32bit = LDA_dms_lda_idx_imm $p0, 0 ; -> only $m0 is available
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/AIE/aie2p/spill/spill-sreg-high-gpr-pressure.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -24,9 +24,9 @@ body: |
; CHECK-LABEL: name: spill_to_mem
; CHECK: liveins: $p0, $r0, $r1, $s0, $s1, $s2, $s3, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ST_dms_sts_spill $r1, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL $r1, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_dms_sts_idx_imm $r0, $p0, 0, implicit $s0
; CHECK-NEXT: renamable $r0 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $r0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $s0 = MOV_alu_mv_mv_mv_scl killed renamable $r0
; CHECK-NEXT: renamable $cml0 = VUPS_2x_mv_ups_x2c_upsSign0 $x0, killed renamable $s0, implicit-def $srups_of, implicit $crsat, implicit $crupsmode, implicit $upssign0
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $cml0, implicit $s1, implicit $s2, implicit $s3
Expand All @@ -52,9 +52,9 @@ body: |
; CHECK: liveins: $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = MOV_alu_mv_mv_mv_scl $s0
; CHECK-NEXT: ST_dms_sts_spill killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: PseudoJL 32, csr_aie2p, implicit-def $lr
; CHECK-NEXT: renamable $r0 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $r0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $s0 = MOV_alu_mv_mv_mv_scl killed renamable $r0
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $s0
%0:spill_es_to_er = COPY $s0
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/AIE/aie2p/spill/spill-sreg.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -24,15 +24,15 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = MOVA 32
; CHECK-NEXT: renamable $r0 = MOV_alu_mv_mv_mv_scl killed renamable $r0
; CHECK-NEXT: ST_dms_sts_spill killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: renamable $r0 = MOVA 32
; CHECK-NEXT: renamable $s2 = COPY killed renamable $r0
; CHECK-NEXT: renamable $r0 = MOVA 32
; CHECK-NEXT: renamable $s3 = COPY killed renamable $r0
; CHECK-NEXT: renamable $r0 = MOVA 32
; CHECK-NEXT: renamable $s1 = COPY killed renamable $r0
; CHECK-NEXT: renamable $cml0 = VUPS_2x_mv_ups_x2c_upsSign0 $x0, $s0, implicit-def $srups_of, implicit $crsat, implicit $crupsmode, implicit $upssign0
; CHECK-NEXT: renamable $r0 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $r0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $s0 = MOV_alu_mv_mv_mv_scl killed renamable $r0
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $s0, implicit killed renamable $s2, implicit killed renamable $s3, implicit killed renamable $s1, implicit killed renamable $cml0
%10:er = MOVA 32
Expand Down Expand Up @@ -109,9 +109,9 @@ body: |
; CHECK: liveins: $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $r0 = MOV_alu_mv_mv_mv_scl $s0
; CHECK-NEXT: ST_dms_sts_spill killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: ST_R_SPILL killed renamable $r0, %stack.0, implicit $sp :: (store (s32) into %stack.0)
; CHECK-NEXT: PseudoJL 32, csr_aie2p, implicit-def $lr
; CHECK-NEXT: renamable $r0 = LDA_dms_lda_spill %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $r0 = LDA_R_SPILL %stack.0, implicit $sp :: (load (s32) from %stack.0)
; CHECK-NEXT: renamable $s0 = MOV_alu_mv_mv_mv_scl killed renamable $r0
; CHECK-NEXT: PseudoRET implicit $lr, implicit killed renamable $s0
%0:es = COPY $s0
Expand Down
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