-
Notifications
You must be signed in to change notification settings - Fork 13
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
End to end support for bfp16 mac/mul intrinsics #279
base: aie-public
Are you sure you want to change the base?
Conversation
case Intrinsic::aie2p_BFP576_BFP1152_ACC2048_mul_conf: | ||
case Intrinsic::aie2p_BFP576_BFP1152_ACC2048_negmul_conf: | ||
MI = MIB.buildInstr(TII.getOpCode(I), {DstReg}, | ||
{Src1Reg, Src2Reg, /*Mode*/ I.getOperand(8).getReg()}); |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Clang-tidy can help with those comments, like: /*Mode=*/I.getOperand(8).getReg()}
.addImm(AIE2P::sub_bfp576_lo) | ||
.addReg(Src2RegSub1) | ||
.addImm(AIE2P::sub_bfp576_hi); | ||
constrainOperandRegClass(*MF, TRI, MRI, TII, RBI, *RegSeq1, |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
nit: can we have a lambda where we pass something like constrainRegSeq(RegSeq1, AIE2P::VEC512RegClass, 1);
?
@@ -18,6 +18,8 @@ | |||
#include "AIE2PTargetMachine.h" | |||
#include "AIEBaseInstructionSelector.h" | |||
#include "MCTargetDesc/aie2p/AIE2PMCTargetDesc.h" | |||
#include "llvm/ADT/ArrayRef.h" |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Those includes are not necessary here.
9de7ac4
to
879d252
Compare
879d252
to
94481ed
Compare
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Could you add register bank select tests for these intrinsics? No need to test every single type, only each intrinsic would be enough, as all vector types follow the same code path.
No description provided.